From patchwork Mon Jul 8 12:00:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dragos Tatulea X-Patchwork-Id: 13726498 Received: from NAM04-BN8-obe.outbound.protection.outlook.com (mail-bn8nam04on2074.outbound.protection.outlook.com [40.107.100.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB24D84A4E; Mon, 8 Jul 2024 12:02:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.100.74 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720440172; cv=fail; b=pXCjlpD2bcWfGxz+mNmcaQZqbQwXIrZAY54Aqhzbe0w1N5kQUgtWxt4ebfMRk74GOotPPTCIUlGD55LBpMNldyVMddf+hkgC9whzrN3Bw1YjP5F3be/Bp9ZRptpVtr4VOHCBpXFac3p31kGkBZh11CwaolRhKWjEpkSvaiav40g= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720440172; c=relaxed/simple; bh=hfGfT4tBrhoKQWnYYnEccOu3DrB2SgW2E7Hjm19C2mk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=KyGj1+NRjkbx/oQCEgVh5OK0tvRwsBLJ2oJ/ZsW8iPvYwRePb2LY9v568JAjGO/4XObCrKGrPzIr0M2rHDA1zfggYB0wEnSX+TA5yVzb09qawO9jeCpL1ba8+WwLMLMlDY3OlVDt2166hOguuniB9hdAjx6gumZsVYJ6ktzRRJc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=lzdSRBel; arc=fail smtp.client-ip=40.107.100.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="lzdSRBel" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AryL+6PfQyjHMWczPc9BqkfmPS6ZvKlAO2Tk292QVIp/PcDrq7AUxAbCWq3k6ufjdhfZ93p1SOPksYOD6APX2lr7ITehmy6YEWKAxttEx7LoEjlcKGBVeJrrmbM9+euht/SkskB/jQlybJQsq5jcJDnuk0EQNV8OYuDRn4OTc4FZNcuCkHQQFZb5Ks6behTYigwdjQEwYsrz/e63bcYnDQyYDOaredh5hSmtxqsN8nZinczsS7AuqeCO63s/M286s5CO2k6S7rkRjRd188hXOXTflUwjSN54oA6ElO4O5q7YmV2sCSuslFp6VZyv6/dYdB76pE5QUX68g9iEB2mXkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=EsHszw7V8zUzUADo6swexPMkyWLFXRkDDgfMbOPnoFA=; b=DUh2/L4gmXtmamltkmIRYzXixiSwfdnHEqnUuEK1yxugH/H6gNf61GUxupXy9qCM+rBAPuLXwZJLAmxvjPMoM1cXeUQvy+gHUpz6GNVOVmd//5z3Fa1HGDSoWFeDth3dPxLBG6FC53xZtkW5bES8Ny0+YEBtkfaLgLG15oPsgXQ+1IIln2C4pUvMvR0Nlt0s2rhF+p4T/WX3nb/q61c2uYl/gXSfLbdFy8QicTZpS84Tb8mq2LkmuioprhYPU2OVGrok1kdruVtQ4VDcQaoRzeT9sJUEuwhBJz+CxVRanub17me6wSvDDQHuehYrbyzWzdC1voDP365jNkovQYOiJQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=oracle.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=EsHszw7V8zUzUADo6swexPMkyWLFXRkDDgfMbOPnoFA=; b=lzdSRBelq1tPP7YW2Am7NjJanll3k4p1c/ulp4ochfVdWSc3cU7RVYFr9FCSbjxJ8tpWxEY2W01cYsTTxzABROszrBlOWEN/87wSZsIDAMLMSu17RZIOpu4L70fn7tk4mHMH24CIwmltghEdHoUCq+STwGiMfo27MagYc32iR70sVMCVohjRn1O9tkXp9Rqgrcfjz4GmTJp1AYV2xHqDFthm5hFzKO1kE7ScvXK803BY+CnXFstC92aEaZVEdn0RcLZkyAfhOu8if3z6gY0elTfteiEQiVuUdDRIkpHWz6rdlzfcaBa9ryf9UQc6y0jG9/skH2YO32BrG96VQepA0A== Received: from MN2PR05CA0055.namprd05.prod.outlook.com (2603:10b6:208:236::24) by IA1PR12MB6139.namprd12.prod.outlook.com (2603:10b6:208:3e9::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7741.35; Mon, 8 Jul 2024 12:02:46 +0000 Received: from BL6PEPF0001AB74.namprd02.prod.outlook.com (2603:10b6:208:236:cafe::cc) by MN2PR05CA0055.outlook.office365.com (2603:10b6:208:236::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7762.19 via Frontend Transport; Mon, 8 Jul 2024 12:02:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL6PEPF0001AB74.mail.protection.outlook.com (10.167.242.167) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7762.17 via Frontend Transport; Mon, 8 Jul 2024 12:02:44 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 8 Jul 2024 05:02:24 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 8 Jul 2024 05:02:23 -0700 Received: from dev-l-177.mtl.labs.mlnx (10.127.8.11) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Mon, 8 Jul 2024 05:02:20 -0700 From: Dragos Tatulea Date: Mon, 8 Jul 2024 15:00:45 +0300 Subject: [PATCH vhost v3 21/24] vdpa/mlx5: Pre-create hardware VQs at vdpa .dev_add time Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240708-stage-vdpa-vq-precreate-v3-21-afe3c766e393@nvidia.com> References: <20240708-stage-vdpa-vq-precreate-v3-0-afe3c766e393@nvidia.com> In-Reply-To: <20240708-stage-vdpa-vq-precreate-v3-0-afe3c766e393@nvidia.com> To: "Michael S. Tsirkin" , Jason Wang , Xuan Zhuo , =?utf-8?q?Eugenio_P=C3=A9rez?= , Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Si-Wei Liu CC: , , , , Dragos Tatulea , Cosmin Ratiu X-Mailer: b4 0.13.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB74:EE_|IA1PR12MB6139:EE_ X-MS-Office365-Filtering-Correlation-Id: 3a2de525-6f1c-498b-4e4f-08dc9f45e031 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|1800799024|7416014; X-Microsoft-Antispam-Message-Info: =?utf-8?q?HV4yyelBGQ57TPtt1vQne2KSQk4Rjnz?= =?utf-8?q?L5RMdte31xOmhTPiWEpCAnZ7aaW5NqSMy9avZeRd3uCWv+YbiBYBHepQFweHopoZQ?= =?utf-8?q?XSjja6JTTLkYs3pLEpu3qcEMffFnhUpIkgfVCkuV/3JusiBgn6TEb8FH1en41J1j1?= =?utf-8?q?GrnRys+AZgx9A6oHrjHo2wFXEP3ISfH7WctlyFUC2qX5Fq3bwkVmul6IDV5SK+xgi?= =?utf-8?q?pPrL1wbvz1rQjknDS2Yh22lkdwEfuMWguks+p4uO/D+hijQrW63g+meddl9Z/7ECF?= =?utf-8?q?5IBSbUzEtpdtSa+cr628MhmEQfo6U/6ZlyeZidMPJgJ9vdvj2pV60Ziu6OU4mmiV9?= =?utf-8?q?/JMQSiRgpfiffYObbsROKEN6p+OrgWyyRvUC+lmrZ963Gkd4SOfgjPL1aifq/LJUS?= =?utf-8?q?eXjgZPwbKML9fatgnpPTySZp83ZKmYXY6QJ6sCx2xZ7sOw8v2l1o+Fs/FXgz3lnaB?= =?utf-8?q?FhOOjyen73rLnBDwUNEKagNpQP+ojuIkRB8IOCPvR0XuZ7w7I4srQC1D5y28ClUgN?= =?utf-8?q?v01aM0L7YDqNFV+qUzZRGg5jwNP5UtjeH4nyAuyJgNprtWJxonbR0/V4fAZrc17J4?= =?utf-8?q?sVsn9aeOHbMWkUNxy2oZEanTigoQgUNMPTY9EL8tIJlk6s17OaLmDRlCb32Bbi1/v?= =?utf-8?q?Q2sHFTjKWWxRSsCOnz2Z2XcwvdtpJ1gxftVL+MPflY8ca3/lw1LsCDBkACDG2cHzH?= =?utf-8?q?uE0UC4pg1J9ynj6TaFbcL5PQQPMM6kMlRB1uZUyjXwtjWCN9aj5637UT5RQL8pqpL?= =?utf-8?q?DIu4cX/773tQlDXRYkVHuRfMCLNlIFhQaOEVu8E3ltGjQ726E7DniJ7si9zi0dhJb?= =?utf-8?q?5OYLyEuxIHj/EpZUXKnk9Oko+FpN5Yq6noNRr2Rzeb/Vr1cBkCTj7qU8FBUAFfPqa?= =?utf-8?q?QTHnGyoB7kjcAfKJbhn/E3Ak/Vvp5xOhBu7U45zf3rwgfm2mkVRtDJZgee3E+74I9?= =?utf-8?q?9WIDm45KQi1N7nQxGWo9sipu0RXsIHQocZGPlQk3g0QF9XANvQy09tzNRo/MX8Qv7?= =?utf-8?q?BcneK5XqMgsNk3RR8bHg/PoQPuYH9H3MvFAQfHGy/gO1h4R2QNVbdg7BBEvyP1Tg2?= =?utf-8?q?6YFAZtwHmZ7Zhk65q9hUnCTYpkoi0/DdU2uaupZwWEDan7R32HW7ZAeiRF/8R3k9d?= =?utf-8?q?3wlomO/vwZYTYBx2HP+Cr9oZeLrdDv2dx5irzPNh9fl98Xr6mAWAJeG2JV3J1vWW2?= =?utf-8?q?XwE2JAbmPUgKQxYjopSQy4EaT6GTzNI/CsIsc3Lz8cW/S2CkEhsVstvRNzogSYYvc?= =?utf-8?q?5xsVAU/NjyFHDEl00J60buRCJTuK1q3GeQC+xf6WOVA2AobDS0KDLmQGsPw883HBR?= =?utf-8?q?GVEFr+Osno+QfQjlibPjvkLYVWuEYv/pb9vL9LvTGb92/N14gINaYi/TLQloSnAuM?= =?utf-8?q?O678L1LKevs?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jul 2024 12:02:44.1249 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3a2de525-6f1c-498b-4e4f-08dc9f45e031 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB74.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6139 Currently, hardware VQs are created right when the vdpa device gets into DRIVER_OK state. That is easier because most of the VQ state is known by then. This patch switches to creating all VQs and their associated resources at device creation time. The motivation is to reduce the vdpa device live migration downtime by moving the expensive operation of creating all the hardware VQs and their associated resources out of downtime on the destination VM. The VQs are now created in a blank state. The VQ configuration will happen later, on DRIVER_OK. Then the configuration will be applied when the VQs are moved to the Ready state. When .set_vq_ready() is called on a VQ before DRIVER_OK, special care is needed: now that the VQ is already created a resume_vq() will be triggered too early when no mr has been configured yet. Skip calling resume_vq() in this case, let it be handled during DRIVER_OK. On a 64 CPU, 256 GB VM with 1 vDPA device of 16 VQps, the full VQ resource creation + resume time was ~370ms. Now it's down to 60 ms (only VQ config and resume). The measurements were done on a ConnectX6DX based vDPA device. Signed-off-by: Dragos Tatulea Reviewed-by: Cosmin Ratiu --- drivers/vdpa/mlx5/net/mlx5_vnet.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5_vnet.c index 324604b16b91..1747f5607838 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -2444,7 +2444,7 @@ static void mlx5_vdpa_set_vq_ready(struct vdpa_device *vdev, u16 idx, bool ready mvq = &ndev->vqs[idx]; if (!ready) { suspend_vq(ndev, mvq); - } else { + } else if (mvdev->status & VIRTIO_CONFIG_S_DRIVER_OK) { if (resume_vq(ndev, mvq)) ready = false; } @@ -3078,10 +3078,18 @@ static void mlx5_vdpa_set_status(struct vdpa_device *vdev, u8 status) goto err_setup; } register_link_notifier(ndev); - err = setup_vq_resources(ndev, true); - if (err) { - mlx5_vdpa_warn(mvdev, "failed to setup driver\n"); - goto err_driver; + if (ndev->setup) { + err = resume_vqs(ndev); + if (err) { + mlx5_vdpa_warn(mvdev, "failed to resume VQs\n"); + goto err_driver; + } + } else { + err = setup_vq_resources(ndev, true); + if (err) { + mlx5_vdpa_warn(mvdev, "failed to setup driver\n"); + goto err_driver; + } } } else { mlx5_vdpa_warn(mvdev, "did not expect DRIVER_OK to be cleared\n"); @@ -3142,6 +3150,7 @@ static int mlx5_vdpa_compat_reset(struct vdpa_device *vdev, u32 flags) if (mlx5_vdpa_create_dma_mr(mvdev)) mlx5_vdpa_warn(mvdev, "create MR failed\n"); } + setup_vq_resources(ndev, false); up_write(&ndev->reslock); return 0; @@ -3835,8 +3844,23 @@ static int mlx5_vdpa_dev_add(struct vdpa_mgmt_dev *v_mdev, const char *name, goto err_reg; mgtdev->ndev = ndev; + + /* The VQs might have been pre-created during device register. + * This happens when virtio_vdpa is loaded before the vdpa device is added. + */ + if (!ndev->setup) + return 0; + + down_write(&ndev->reslock); + err = setup_vq_resources(ndev, false); + up_write(&ndev->reslock); + if (err) + goto err_setup_vq_res; + return 0; +err_setup_vq_res: + _vdpa_unregister_device(&mvdev->vdev); err_reg: destroy_workqueue(mvdev->wq); err_res2: @@ -3862,6 +3886,11 @@ static void mlx5_vdpa_dev_del(struct vdpa_mgmt_dev *v_mdev, struct vdpa_device * unregister_link_notifier(ndev); _vdpa_unregister_device(dev); + + down_write(&ndev->reslock); + teardown_vq_resources(ndev); + up_write(&ndev->reslock); + wq = mvdev->wq; mvdev->wq = NULL; destroy_workqueue(wq);