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Mon, 8 Jul 2024 05:01:24 -0700 From: Dragos Tatulea Date: Mon, 8 Jul 2024 15:00:31 +0300 Subject: [PATCH vhost v3 07/24] vdpa/mlx5: Initialize and reset device with one queue pair Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240708-stage-vdpa-vq-precreate-v3-7-afe3c766e393@nvidia.com> References: <20240708-stage-vdpa-vq-precreate-v3-0-afe3c766e393@nvidia.com> In-Reply-To: <20240708-stage-vdpa-vq-precreate-v3-0-afe3c766e393@nvidia.com> To: "Michael S. Tsirkin" , Jason Wang , Xuan Zhuo , =?utf-8?q?Eugenio_P=C3=A9rez?= , Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Si-Wei Liu CC: , , , , Cosmin Ratiu , Dragos Tatulea X-Mailer: b4 0.13.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E5F:EE_|PH7PR12MB6668:EE_ X-MS-Office365-Filtering-Correlation-Id: b527ada5-177b-4513-a74d-08dc9f45cca0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|7416014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?q?Ve2xpi62J1mRWxm7GU/MYSu82tbqcIQ?= =?utf-8?q?4u0e3s6EbLuCjcEE+jx3+hA/9XPfXzYPclKfVgrDNtP9D4SDhjHG7Zu+4Uucis4re?= =?utf-8?q?sN98UNshATCNhPHmJlbM2ZlBwiiDWL0NxTL6aJNqBUr8LMu7b5s7bfzr1OjWO2fK+?= =?utf-8?q?gmNAuSPb1KCdmVIQIx+HxYEDwSeki0/LFHjZ1nP80Fd10+oe2jmbPD5QgHEgb3ipt?= =?utf-8?q?/a4qpFJhZq6U8S9sidSBrSUMzm+Ph20d24Gig1lR6d5y5ftQTIqJf0A6YO4wJ96PL?= =?utf-8?q?VE660GgXkgC1FNUQk87HwaZpKMFZ7tVLY5R+RSj6x1FBnkdBne9WKA/VyEUijehG9?= =?utf-8?q?9Bu8QqJsilbM3OumIxe9dGwPE0UHsL/HAVbbHjzAS0d+S+voKPvgrukPXCs4BRNal?= =?utf-8?q?FWkF96Hn5WU1rnKWy6D6x7go1qNl0kGZXUjI8LBBDNkp12WhGJYKSBt2AJNdePLry?= =?utf-8?q?uKx1F+sGXh+ZjXbG64PJS8ukfmPIUHdaZ/BgONRS9pZUaRdTNSu07cU7z3xW/DjwO?= =?utf-8?q?1LbbRfoa1hgt0EmqKWx2pLUoduqvHQX1RqV7fZnLuNVUBxeH3UV3ZOxexnDIvCqhz?= =?utf-8?q?iugeiaOu9j+neq4KsRbjWxBXUSOuzVN+RB2vtaAxEuP1XctdhPxJqgP14Zq/59qfq?= =?utf-8?q?qKMw/mL0PiCL7wDGMMxzoWYAlg/vLpZe2LrZCsI0QkeFdDaOIBJST5y4CoOi1TkPY?= =?utf-8?q?kb5tldJZe0V5qlqgRybDx7L4jtBOLo5DCBIGxWGOuguOnaoUTrAgyjj5FgQHvE2Qs?= =?utf-8?q?AwYreudU71F2PmPUYDO3TLKsyVf5ThWJZXzdEsKY/qWqgpVi2q2XHWREyyqWjI3+N?= =?utf-8?q?t5A6qRpUB/rMfalac77Yq3wDQ4avS654oPn18a/q1PgT519DOcuYLJZ1pr04t7gXN?= =?utf-8?q?Brc3W+4p4lb2dP5kA4tyeCgBYJ0pERKiq1xPEcGmXBsEaHy4ARfEeKLHaV8WoouFf?= =?utf-8?q?jTRBBbm67pSKRXo//c8FQRQ+CPeAAtXDrgGfDRtzr9cRa6Ku1ByVBJez9jMemTzFe?= =?utf-8?q?g21UabC5jjIdbPu1BnLpnB6m/PKlkVfm82wpI9GxuU15Ps0ohmG+rI6RXtjMMFTbT?= =?utf-8?q?FS4D+JJ2Rw/V2jMfXsYBfY2YMwJQSa9+HVDyZxnxDhkM3hYwf8HjCRNhXxJWz3tqJ?= =?utf-8?q?PgIe33vcB0rReOCzexOk9QyMQA80KmsCrtEqMP5DhBhXlkXj+UgoOQbzUXeBhA86x?= =?utf-8?q?tJe0Jf6geZnrzvXGNxgRpBJszS+R7y6bxvfe6HYA7lOKDLCPi+XzHPd7VKsUdMgYQ?= =?utf-8?q?0+TNIIYHGSX9/kMcsrVgHihzRGGH4XOasZWv6aj27JTi4rmpbV1pQSTMdsKrbQ51W?= =?utf-8?q?xfVZ/3F5jAQRLqWW09GHHyZHgF6iu2yReEEa3ZA/XRN3gcknJVvz3Ey4V2irxOr8f?= =?utf-8?q?bhc6KPVcjWK?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(36860700013)(7416014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jul 2024 12:02:11.1595 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b527ada5-177b-4513-a74d-08dc9f45cca0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E5F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6668 The virtio spec says that a vdpa device should start off with one queue pair. The driver is already compliant. This patch moves the initialization to device add and reset times. This is done in preparation for the pre-creation of hardware virtqueues at device add time. Reviewed-by: Cosmin Ratiu Acked-by: Eugenio Pérez Signed-off-by: Dragos Tatulea --- drivers/vdpa/mlx5/net/mlx5_vnet.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5_vnet.c index eca6f68c2eda..c8b5c87f001d 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -48,6 +48,16 @@ MODULE_LICENSE("Dual BSD/GPL"); #define MLX5V_UNTAGGED 0x1000 +/* Device must start with 1 queue pair, as per VIRTIO v1.2 spec, section + * 5.1.6.5.5 "Device operation in multiqueue mode": + * + * Multiqueue is disabled by default. + * The driver enables multiqueue by sending a command using class + * VIRTIO_NET_CTRL_MQ. The command selects the mode of multiqueue + * operation, as follows: ... + */ +#define MLX5V_DEFAULT_VQ_COUNT 2 + struct mlx5_vdpa_cq_buf { struct mlx5_frag_buf_ctrl fbc; struct mlx5_frag_buf frag_buf; @@ -2713,16 +2723,6 @@ static int mlx5_vdpa_set_driver_features(struct vdpa_device *vdev, u64 features) else ndev->rqt_size = 1; - /* Device must start with 1 queue pair, as per VIRTIO v1.2 spec, section - * 5.1.6.5.5 "Device operation in multiqueue mode": - * - * Multiqueue is disabled by default. - * The driver enables multiqueue by sending a command using class - * VIRTIO_NET_CTRL_MQ. The command selects the mode of multiqueue - * operation, as follows: ... - */ - ndev->cur_num_vqs = 2; - update_cvq_info(mvdev); return err; } @@ -3040,7 +3040,7 @@ static int mlx5_vdpa_compat_reset(struct vdpa_device *vdev, u32 flags) mlx5_vdpa_destroy_mr_resources(&ndev->mvdev); ndev->mvdev.status = 0; ndev->mvdev.suspended = false; - ndev->cur_num_vqs = 0; + ndev->cur_num_vqs = MLX5V_DEFAULT_VQ_COUNT; ndev->mvdev.cvq.received_desc = 0; ndev->mvdev.cvq.completed_desc = 0; memset(ndev->event_cbs, 0, sizeof(*ndev->event_cbs) * (mvdev->max_vqs + 1)); @@ -3643,6 +3643,7 @@ static int mlx5_vdpa_dev_add(struct vdpa_mgmt_dev *v_mdev, const char *name, err = -ENOMEM; goto err_alloc; } + ndev->cur_num_vqs = MLX5V_DEFAULT_VQ_COUNT; init_mvqs(ndev); allocate_irqs(ndev);