mlx4_core: removed reservation of FEXCH QPs and MPTs
mlx4_fc module will reserve them upon loading.
Added mpt reserve_range and release_range functions.
Signed-off-by: Oren Duer <oren@mellanox.co.il>
Signed-off-by: Vu Pham <vu@mellanx.com>
drivers/net/mlx4/main.c | 4 +---
drivers/net/mlx4/mr.c | 29 +++++++++++++++++++++++------
include/linux/mlx4/device.h | 7 ++-----
3 files changed, 26 insertions(+), 14 deletions(-)
@@ -259,12 +259,10 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
(1 << dev->caps.log_num_vlans) *
(1 << dev->caps.log_num_prios) *
dev->caps.num_ports;
- dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
- dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
- dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
+ dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR];
return 0;
}
@@ -267,6 +267,28 @@ static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox
!mailbox, MLX4_CMD_HW2SW_MPT, MLX4_CMD_TIME_CLASS_B);
}
+int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32 *base_mridx)
+{
+ struct mlx4_priv *priv = mlx4_priv(dev);
+ u32 mridx;
+
+ mridx = mlx4_bitmap_alloc_range(&priv->mr_table.mpt_bitmap, cnt, align);
+ if (mridx == -1)
+ return -ENOMEM;
+
+ *base_mridx = mridx;
+ return 0;
+
+}
+EXPORT_SYMBOL_GPL(mlx4_mr_reserve_range);
+
+void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt)
+{
+ struct mlx4_priv *priv = mlx4_priv(dev);
+ mlx4_bitmap_free_range(&priv->mr_table.mpt_bitmap, base_mridx, cnt);
+}
+EXPORT_SYMBOL_GPL(mlx4_mr_release_range);
+
int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd,
u64 iova, u64 size, u32 access, int npages,
int page_shift, struct mlx4_mr *mr)
@@ -486,13 +508,8 @@ int mlx4_init_mr_table(struct mlx4_dev *dev)
if (!is_power_of_2(dev->caps.num_mpts))
return -EINVAL;
- dev->caps.num_fexch_mpts =
- 2 * dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
- dev->caps.reserved_fexch_mpts_base = dev->caps.num_mpts -
- dev->caps.num_fexch_mpts;
err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts,
- ~0, dev->caps.reserved_mrws,
- dev->caps.reserved_fexch_mpts_base);
+ ~0, dev->caps.reserved_mrws, 0);
if (err)
return err;
@@ -151,7 +151,6 @@ enum mlx4_qp_region {
MLX4_QP_REGION_FW = 0,
MLX4_QP_REGION_ETH_ADDR,
MLX4_QP_REGION_FC_ADDR,
- MLX4_QP_REGION_FC_EXCH,
MLX4_NUM_QP_REGION
};
@@ -167,10 +166,6 @@ enum mlx4_special_vlan_idx {
MLX4_VLAN_REGULAR
};
-enum {
- MLX4_NUM_FEXCH = 64 * 1024,
-};
-
#define MLX4_LEAST_ATTACHED_VECTOR 0xffffffff
static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
@@ -426,6 +421,8 @@ int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift,
void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt);
u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt);
+int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32 *base_mridx);
+void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt);
int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd,
u64 iova, u64 size, u32 access, int npages,
int page_shift, struct mlx4_mr *mr);