From patchwork Fri Aug 6 22:50:31 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vu Pham X-Patchwork-Id: 118086 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o76MtctX027523 for ; Fri, 6 Aug 2010 22:58:10 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965188Ab0HFW6K (ORCPT ); Fri, 6 Aug 2010 18:58:10 -0400 Received: from p02c11o148.mxlogic.net ([208.65.144.81]:60843 "EHLO p02c11o148.mxlogic.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964904Ab0HFW6J (ORCPT ); Fri, 6 Aug 2010 18:58:09 -0400 Received: from unknown [63.251.237.3] (EHLO p02c11o148.mxlogic.net) by p02c11o148.mxlogic.net(mxl_mta-6.7.0-0) with ESMTP id 1839c5c4.640d6940.188805.00-596.439836.p02c11o148.mxlogic.net (envelope-from ); Fri, 06 Aug 2010 16:58:09 -0600 (MDT) X-MXL-Hash: 4c5c93811671cd8a-1d383f425634d75728be3ae3045c937bd051c1da Received: from unknown [63.251.237.3] (EHLO mtiexch01.mti.com) by p02c11o148.mxlogic.net(mxl_mta-6.7.0-0) with ESMTP id 7b19c5c4.0.187962.00-285.438041.p02c11o148.mxlogic.net (envelope-from ); Fri, 06 Aug 2010 16:50:32 -0600 (MDT) X-MXL-Hash: 4c5c91b84ebdcf8a-ff5323f814f2afccb29222590baa2092908758e7 Received: from vu-lt.mti.mtl.com ([10.2.1.17]) by mtiexch01.mti.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 6 Aug 2010 15:54:47 -0700 Message-ID: <4C5C91B7.2050606@mellanox.com> Date: Fri, 06 Aug 2010 15:50:31 -0700 From: Vu Pham User-Agent: Thunderbird 2.0.0.23 (X11/20090812) MIME-Version: 1.0 To: Roland Dreier CC: Oren Duer , Linux RDMA , OpenFabrics EWG Subject: [PATCH 04/10] remove default reservation of fexch qps and mpts X-OriginalArrivalTime: 06 Aug 2010 22:54:47.0218 (UTC) FILETIME=[5E485920:01CB35BA] X-Spam: [F=0.2000000000; CM=0.500; S=0.200(2010073001)] X-MAIL-FROM: X-SOURCE-IP: [63.251.237.3] X-AnalysisOut: [v=1.0 c=1 a=b9kjf311YhMA:10 a=VphdPIyG4kEA:10 a=xupnbh4h0Y] X-AnalysisOut: [LOHZnncC45HQ==:17 a=SeBm4QpjAAAA:8 a=X0vuYrAVbawg2hqj_bgA:] X-AnalysisOut: [9 a=6iZILobRvft2pOZw7Izackw4yKsA:4 a=wPNLvfGTeEIA:10 a=T2c] X-AnalysisOut: [JKXzbRCYA:10 a=4DpXzvdHqtnfX1_KLgcA:9 a=tCRQP8XP4Y8S9fNnL0] X-AnalysisOut: [QA:7 a=iQufB1iJS4RSZr6QR_PxjnMiMakA:4 a=W4lEj--sdPRygxf1:2] X-AnalysisOut: [1 a=VCvMrjkGqSYglk8e:21] Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 06 Aug 2010 22:58:11 +0000 (UTC) mlx4_core: removed reservation of FEXCH QPs and MPTs mlx4_fc module will reserve them upon loading. Added mpt reserve_range and release_range functions. Signed-off-by: Oren Duer Signed-off-by: Vu Pham drivers/net/mlx4/main.c | 4 +--- drivers/net/mlx4/mr.c | 29 +++++++++++++++++++++++------ include/linux/mlx4/device.h | 7 ++----- 3 files changed, 26 insertions(+), 14 deletions(-) diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index 38fbf01..bbf773d 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c @@ -259,12 +259,10 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) (1 << dev->caps.log_num_vlans) * (1 << dev->caps.log_num_prios) * dev->caps.num_ports; - dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + - dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + - dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR]; return 0; } diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c index 7185c17..5f07e0c 100644 --- a/drivers/net/mlx4/mr.c +++ b/drivers/net/mlx4/mr.c @@ -267,6 +267,28 @@ static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox !mailbox, MLX4_CMD_HW2SW_MPT, MLX4_CMD_TIME_CLASS_B); } +int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32 *base_mridx) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u32 mridx; + + mridx = mlx4_bitmap_alloc_range(&priv->mr_table.mpt_bitmap, cnt, align); + if (mridx == -1) + return -ENOMEM; + + *base_mridx = mridx; + return 0; + +} +EXPORT_SYMBOL_GPL(mlx4_mr_reserve_range); + +void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + mlx4_bitmap_free_range(&priv->mr_table.mpt_bitmap, base_mridx, cnt); +} +EXPORT_SYMBOL_GPL(mlx4_mr_release_range); + int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd, u64 iova, u64 size, u32 access, int npages, int page_shift, struct mlx4_mr *mr) @@ -486,13 +508,8 @@ int mlx4_init_mr_table(struct mlx4_dev *dev) if (!is_power_of_2(dev->caps.num_mpts)) return -EINVAL; - dev->caps.num_fexch_mpts = - 2 * dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; - dev->caps.reserved_fexch_mpts_base = dev->caps.num_mpts - - dev->caps.num_fexch_mpts; err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts, - ~0, dev->caps.reserved_mrws, - dev->caps.reserved_fexch_mpts_base); + ~0, dev->caps.reserved_mrws, 0); if (err) return err; diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 4664d1d..8afac02 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -151,7 +151,6 @@ enum mlx4_qp_region { MLX4_QP_REGION_FW = 0, MLX4_QP_REGION_ETH_ADDR, MLX4_QP_REGION_FC_ADDR, - MLX4_QP_REGION_FC_EXCH, MLX4_NUM_QP_REGION }; @@ -167,10 +166,6 @@ enum mlx4_special_vlan_idx { MLX4_VLAN_REGULAR }; -enum { - MLX4_NUM_FEXCH = 64 * 1024, -}; - #define MLX4_LEAST_ATTACHED_VECTOR 0xffffffff static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) @@ -426,6 +421,8 @@ int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt); u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt); +int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32 *base_mridx); +void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt); int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd, u64 iova, u64 size, u32 access, int npages, int page_shift, struct mlx4_mr *mr);