From patchwork Mon Aug 16 22:16:24 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vu Pham X-Patchwork-Id: 119819 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o7GMPrNm012090 for ; Mon, 16 Aug 2010 22:25:53 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756515Ab0HPWZv (ORCPT ); Mon, 16 Aug 2010 18:25:51 -0400 Received: from p02c12o145.mxlogic.net ([208.65.145.78]:36468 "EHLO p02c12o145.mxlogic.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932078Ab0HPWZs (ORCPT ); Mon, 16 Aug 2010 18:25:48 -0400 Received: from unknown [63.251.237.3] (EHLO p02c12o145.mxlogic.net) by p02c12o145.mxlogic.net(mxl_mta-6.7.0-0) with ESMTP id ceab96c4.5ce28940.24807.00-587.55503.p02c12o145.mxlogic.net (envelope-from ); Mon, 16 Aug 2010 16:25:48 -0600 (MDT) X-MXL-Hash: 4c69baec010191dc-53a388d9af5ecf50ba980f7ea71ef46f0db30433 Received: from unknown [63.251.237.3] (EHLO mtiexch01.mti.com) by p02c12o145.mxlogic.net(mxl_mta-6.7.0-0) with ESMTP id 7b8b96c4.0.23093.00-396.51726.p02c12o145.mxlogic.net (envelope-from ); Mon, 16 Aug 2010 16:16:25 -0600 (MDT) X-MXL-Hash: 4c69b8b946d1025d-3ac73f71a8f7cfd1e70358cdb7bd38e9a35aacff Received: from vu-lt.mti.mtl.com ([10.2.1.17]) by mtiexch01.mti.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 16 Aug 2010 15:20:47 -0700 Message-ID: <4C69B8B8.7030800@mellanox.com> Date: Mon, 16 Aug 2010 15:16:24 -0700 From: Vu Pham User-Agent: Thunderbird 2.0.0.23 (X11/20090812) MIME-Version: 1.0 To: Roland Dreier CC: OpenFabrics EWG , Linux RDMA , Oren Duer Subject: [PATCH v1 03/10] mlx4_core: Add mr_reserve_range to pre-reserve a range of MPTs X-OriginalArrivalTime: 16 Aug 2010 22:20:47.0812 (UTC) FILETIME=[46D53040:01CB3D91] X-Spam: [F=0.2000000000; CM=0.500; S=0.200(2010073001)] X-MAIL-FROM: X-SOURCE-IP: [63.251.237.3] X-AnalysisOut: [v=1.0 c=1 a=gLj3R1ZQqQUA:10 a=VphdPIyG4kEA:10 a=xupnbh4h0Y] X-AnalysisOut: [LOHZnncC45HQ==:17 a=37r9H06TAAAA:8 a=CbDCq_QkAAAA:8 a=dNO4] X-AnalysisOut: [RYYS4sVhcnFs2NUA:9 a=Who0u_k0qEUxX_ZVrNUA:7 a=PW8fRr0IPWCc] X-AnalysisOut: [TAq9H0Z4K3vAlSUA:4 a=E3yz0KKPV6YA:10 a=2x9iGiAASYUHlW_Z:21] X-AnalysisOut: [ a=566YsM0CVf_-cCBi:21] Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Mon, 16 Aug 2010 22:25:53 +0000 (UTC) From b570c5df5006119ac626d96551cc0a9935037e5f Mon Sep 17 00:00:00 2001 From: Vu Pham Date: Tue, 10 Aug 2010 14:10:57 -0700 Subject: [PATCH 03/10] mlx4_core: Add mr_reserve_range to pre-reserve a range of MPTs Add MPTs mr_reserve/free_range Remove QPs and MPTs static reservation for FC_EXCH by default. mlx4_fc driver will reserve them upon loading Signed-off-by: Oren Duer Signed-off-by: Vu Pham --- drivers/net/mlx4/main.c | 4 +--- drivers/net/mlx4/mr.c | 22 ++++++++++++++++++++++ include/linux/mlx4/device.h | 7 ++----- 3 files changed, 25 insertions(+), 8 deletions(-) diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index fe3be88..fbe646a 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c @@ -259,12 +259,10 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) (1 << dev->caps.log_num_vlans) * (1 << dev->caps.log_num_prios) * dev->caps.num_ports; - dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + - dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + - dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR]; return 0; } diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c index 35c0af6..ba0514d 100644 --- a/drivers/net/mlx4/mr.c +++ b/drivers/net/mlx4/mr.c @@ -263,6 +263,28 @@ static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox !mailbox, MLX4_CMD_HW2SW_MPT, MLX4_CMD_TIME_CLASS_B); } +int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32 *base_mridx) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u32 mridx; + + mridx = mlx4_bitmap_alloc_range(&priv->mr_table.mpt_bitmap, cnt, align); + if (mridx == -1) + return -ENOMEM; + + *base_mridx = mridx; + return 0; + +} +EXPORT_SYMBOL_GPL(mlx4_mr_reserve_range); + +void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + mlx4_bitmap_free_range(&priv->mr_table.mpt_bitmap, base_mridx, cnt); +} +EXPORT_SYMBOL_GPL(mlx4_mr_release_range); + int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd, u64 iova, u64 size, u32 access, int npages, int page_shift, struct mlx4_mr *mr) diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 66849cf..da8ab85 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -151,7 +151,6 @@ enum mlx4_qp_region { MLX4_QP_REGION_FW = 0, MLX4_QP_REGION_ETH_ADDR, MLX4_QP_REGION_FC_ADDR, - MLX4_QP_REGION_FC_EXCH, MLX4_NUM_QP_REGION }; @@ -167,10 +166,6 @@ enum mlx4_special_vlan_idx { MLX4_VLAN_REGULAR }; -enum { - MLX4_NUM_FEXCH = 64 * 1024, -}; - static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) { return (major << 32) | (minor << 16) | subminor; @@ -424,6 +419,8 @@ int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt); u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt); +int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32 *base_mridx); +void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt); int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd, u64 iova, u64 size, u32 access, int npages, int page_shift, struct mlx4_mr *mr); -- 1.6.3.3