| Message ID | 20240412183708.4036007-1-tanmay.shah@amd.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | add zynqmp TCM bindings | expand |
On Fri, Apr 12, 2024 at 11:37:04AM -0700, Tanmay Shah wrote: > Tightly-Coupled Memories(TCMs) are low-latency memory that provides > predictable instruction execution and predictable data load/store > timing. Each Cortex-R5F processor contains exclusive two 64 KB memory > banks on the ATCM and BTCM ports, for a total of 128 KB of memory. > In lockstep mode, both 128KB memory is accessible to the cluster. > > As per ZynqMP Ultrascale+ Technical Reference Manual UG1085, following > is address space of TCM memory. The bindings in this patch series > introduces properties to accommodate following address space with > address translation between Linux and Cortex-R5 views. > > | | | | > | --- | --- | --- | > | *Mode* | *R5 View* | *Linux view* | Notes | > | *Split Mode* | *start addr*| *start addr* | | > | R5_0 ATCM (64 KB) | 0x0000_0000 | 0xFFE0_0000 | | > | R5_0 BTCM (64 KB) | 0x0002_0000 | 0xFFE2_0000 | | > | R5_1 ATCM (64 KB) | 0x0000_0000 | 0xFFE9_0000 | alias of 0xFFE1_0000 | > | R5_1 BTCM (64 KB) | 0x0002_0000 | 0xFFEB_0000 | alias of 0xFFE3_0000 | > | ___ | ___ | ___ | | > | *Lockstep Mode* | | | | > | R5_0 ATCM (128 KB) | 0x0000_0000 | 0xFFE0_0000 | | > | R5_0 BTCM (128 KB) | 0x0002_0000 | 0xFFE2_0000 | | > > References: > UG1085 TCM address space: > https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Tightly-Coupled-Memory-Address-Map > I have applied patches 1, 2 and 4 of this set. Patch 3 should to through Michal's tree. Thanks, Mathieu > --- > > prerequisite-patch-link: https://lore.kernel.org/all/d4556268-8274-4089-949f-3b97d67793c7@gmail.com/ > Base Branch: 6.9.rc2 > > Changes in v15: > - Use hardcode TCM addresses as fallback method if "reg" unavailable > - Use new bindings for r5fss subsystem > > Changes in v14: > - Add xlnx,tcm-mode property and use it for TCM configuration > - Add Versal and Versal-NET platform support > - Maintain backward compatibility for ZynqMP platform and use hardcode > TCM addresses > > Changes in v13: > - Have power-domains property for lockstep case instead of > keeping it flexible. > - Add "items:" list in power-domains property > > > Radhey Shyam Pandey (1): > dt-bindings: remoteproc: add Tightly Coupled Memory (TCM) bindings > > Tanmay Shah (3): > remoteproc: zynqmp: fix lockstep mode memory region > dts: zynqmp: add properties for TCM in remoteproc > remoteproc: zynqmp: parse TCM from device tree > > .../remoteproc/xlnx,zynqmp-r5fss.yaml | 279 ++++++++++++++++-- > .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 + > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 67 ++++- > drivers/remoteproc/xlnx_r5_remoteproc.c | 273 +++++++++-------- > 4 files changed, 459 insertions(+), 168 deletions(-) > > > base-commit: 4d5aabb6843939fad36912be8bf109adf9af0848 > -- > 2.25.1 >
Tightly-Coupled Memories(TCMs) are low-latency memory that provides predictable instruction execution and predictable data load/store timing. Each Cortex-R5F processor contains exclusive two 64 KB memory banks on the ATCM and BTCM ports, for a total of 128 KB of memory. In lockstep mode, both 128KB memory is accessible to the cluster. As per ZynqMP Ultrascale+ Technical Reference Manual UG1085, following is address space of TCM memory. The bindings in this patch series introduces properties to accommodate following address space with address translation between Linux and Cortex-R5 views. | | | | | --- | --- | --- | | *Mode* | *R5 View* | *Linux view* | Notes | | *Split Mode* | *start addr*| *start addr* | | | R5_0 ATCM (64 KB) | 0x0000_0000 | 0xFFE0_0000 | | | R5_0 BTCM (64 KB) | 0x0002_0000 | 0xFFE2_0000 | | | R5_1 ATCM (64 KB) | 0x0000_0000 | 0xFFE9_0000 | alias of 0xFFE1_0000 | | R5_1 BTCM (64 KB) | 0x0002_0000 | 0xFFEB_0000 | alias of 0xFFE3_0000 | | ___ | ___ | ___ | | | *Lockstep Mode* | | | | | R5_0 ATCM (128 KB) | 0x0000_0000 | 0xFFE0_0000 | | | R5_0 BTCM (128 KB) | 0x0002_0000 | 0xFFE2_0000 | | References: UG1085 TCM address space: https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Tightly-Coupled-Memory-Address-Map --- prerequisite-patch-link: https://lore.kernel.org/all/d4556268-8274-4089-949f-3b97d67793c7@gmail.com/ Base Branch: 6.9.rc2 Changes in v15: - Use hardcode TCM addresses as fallback method if "reg" unavailable - Use new bindings for r5fss subsystem Changes in v14: - Add xlnx,tcm-mode property and use it for TCM configuration - Add Versal and Versal-NET platform support - Maintain backward compatibility for ZynqMP platform and use hardcode TCM addresses Changes in v13: - Have power-domains property for lockstep case instead of keeping it flexible. - Add "items:" list in power-domains property Radhey Shyam Pandey (1): dt-bindings: remoteproc: add Tightly Coupled Memory (TCM) bindings Tanmay Shah (3): remoteproc: zynqmp: fix lockstep mode memory region dts: zynqmp: add properties for TCM in remoteproc remoteproc: zynqmp: parse TCM from device tree .../remoteproc/xlnx,zynqmp-r5fss.yaml | 279 ++++++++++++++++-- .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 + arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 67 ++++- drivers/remoteproc/xlnx_r5_remoteproc.c | 273 +++++++++-------- 4 files changed, 459 insertions(+), 168 deletions(-) base-commit: 4d5aabb6843939fad36912be8bf109adf9af0848