mbox series

[0/2] introduce sunxi hwspinlock

Message ID cover.1605767679.git.fuyao@allwinnertech.com (mailing list archive)
Headers show
Series introduce sunxi hwspinlock | expand

Message

fuyao Nov. 19, 2020, 6:44 a.m. UTC
From: fuyao <fuyao@allwinnertech.com>

this series add hwspinlock of sunxi. it provides hardware assistance for
synchronization between the multiple processors in the system.
(Or1k, Cortex-A7, Cortex-A53, Xtensa)

fuyao (2):
  dt-bindings: hwlock: add sunxi hwlock
  hwspinlock: add SUNXI implementation

 .../bindings/hwlock/sunxi,hwspinlock.yaml     |  46 ++++
 MAINTAINERS                                   |   6 +
 drivers/hwspinlock/Kconfig                    |  10 +
 drivers/hwspinlock/Makefile                   |   1 +
 drivers/hwspinlock/sunxi_hwspinlock.c         | 205 ++++++++++++++++++
 5 files changed, 268 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwlock/sunxi,hwspinlock.yaml
 create mode 100644 drivers/hwspinlock/sunxi_hwspinlock.c

Comments

Maxime Ripard Nov. 20, 2020, 4:07 p.m. UTC | #1
Hi!

On Thu, Nov 19, 2020 at 02:44:51PM +0800, fuyao@allwinnertech.com wrote:
> From: fuyao <fuyao@allwinnertech.com>
> 
> this series add hwspinlock of sunxi. it provides hardware assistance for
> synchronization between the multiple processors in the system.
> (Or1k, Cortex-A7, Cortex-A53, Xtensa)

Xtensa? Which SoC has an Xtensa core?

Unfortunately, there's been a submission of the same driver earlier this week:
https://lore.kernel.org/lkml/cover.1605693132.git.wilken.gottwalt@posteo.net/

It would be great if you could point out whatever issue there is with
that patch series (it looks like the retry delay could be useful for
example).

Thanks!
Maxime
fuyao Nov. 21, 2020, 2:08 p.m. UTC | #2
On Fri, Nov 20, 2020 at 05:07:10PM +0100, Maxime Ripard wrote:
> Hi!
> 
> On Thu, Nov 19, 2020 at 02:44:51PM +0800, fuyao@allwinnertech.com wrote:
> > From: fuyao <fuyao@allwinnertech.com>
> > 
> > this series add hwspinlock of sunxi. it provides hardware assistance for
> > synchronization between the multiple processors in the system.
> > (Or1k, Cortex-A7, Cortex-A53, Xtensa)
> 
> Xtensa? Which SoC has an Xtensa core?

The new Soc named R329 use Xtensa core as the arisc role and audio.
And the hwspinlock is the same as h3 and h6.

Additional, The new RISC-V Soc also use the same hwspinlock.

> 
> Unfortunately, there's been a submission of the same driver earlier this week:
> https://lore.kernel.org/lkml/cover.1605693132.git.wilken.gottwalt@posteo.net/
> 
> It would be great if you could point out whatever issue there is with
> that patch series (it looks like the retry delay could be useful for
> example).

I will test that submission with arisc next week.

BTW, which sunxi board you used, I want to used the same board with you.

^-^

thanks