From patchwork Tue Oct 25 20:57:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sarangdhar Joshi X-Patchwork-Id: 9395471 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0A0AD60236 for ; Tue, 25 Oct 2016 20:57:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E224F29747 for ; Tue, 25 Oct 2016 20:57:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D6DFA29746; Tue, 25 Oct 2016 20:57:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D596E29747 for ; Tue, 25 Oct 2016 20:57:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755081AbcJYU5k (ORCPT ); Tue, 25 Oct 2016 16:57:40 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:49282 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752333AbcJYU5j (ORCPT ); Tue, 25 Oct 2016 16:57:39 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0D6F361635; Tue, 25 Oct 2016 20:57:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477429059; bh=bW77jtgKM/i74/5Z1voImpKDBBl2//XJYVQTw3ZG6T4=; h=From:To:Cc:Subject:Date:From; b=XjuVxPuA+iLN/Tr55c3eVUkcCE+G3ulJR0klYs48PEVVDKK3ITPnJoB0LmNVydGNs Y36cAsPHc5xRqX5Ff8VYw2Es6EaMp+8ngoO5pDqxiHnAslttGdMTYyY/rN25mgS3ur O/4j1Kt3I2RIql82zuWYdmyHOYBHgobtiPTYcibg= Received: from spjoshi-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: spjoshi@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6229461483; Tue, 25 Oct 2016 20:57:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477429058; bh=bW77jtgKM/i74/5Z1voImpKDBBl2//XJYVQTw3ZG6T4=; h=From:To:Cc:Subject:Date:From; b=GFrDW+SVObZLk5C80ENAtaVSQjj40++jmpR9e3yYtAtRBL4t7IHnGQYCugw3399wk i+xTFrAqa91k40c30n2/SeDEyn57oM/1a56xeG89vbdlXsVbH59HgYjFyYP9zjVDV/ KBrDruJzNPTFp1L8cJmlJsbmyzxAUSBuTeDXdCu0= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 6229461483 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=spjoshi@codeaurora.org From: Sarangdhar Joshi To: Ohad Ben-Cohen , Bjorn Andersson Cc: Sarangdhar Joshi , linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Stephen Boyd , Trilok Soni Subject: [PATCH v2 1/1] remoteproc: Add support for xo clock Date: Tue, 25 Oct 2016 13:57:26 -0700 Message-Id: <1477429046-26855-1-git-send-email-spjoshi@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add xo clock support required to boot up Qualcomm ADSP processor. The ADSP remoteproc driver keeps xo clock enabled until the driver receives "handover" irq, in order to allow ADSP processor to vote for xo clock with rpm. Signed-off-by: Sarangdhar Joshi --- drivers/remoteproc/qcom_adsp_pil.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_adsp_pil.c b/drivers/remoteproc/qcom_adsp_pil.c index 9141633..5bb25d1 100644 --- a/drivers/remoteproc/qcom_adsp_pil.c +++ b/drivers/remoteproc/qcom_adsp_pil.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -48,6 +49,8 @@ struct qcom_adsp { struct qcom_smem_state *state; unsigned stop_bit; + struct clk *xo; + struct regulator *cx_supply; struct completion start_done; @@ -102,10 +105,14 @@ static int adsp_start(struct rproc *rproc) struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; int ret; - ret = regulator_enable(adsp->cx_supply); + ret = clk_prepare_enable(adsp->xo); if (ret) return ret; + ret = regulator_enable(adsp->cx_supply); + if (ret) + goto disable_clocks; + ret = qcom_scm_pas_auth_and_reset(ADSP_PAS_ID); if (ret) { dev_err(adsp->dev, @@ -126,6 +133,8 @@ static int adsp_start(struct rproc *rproc) disable_regulators: regulator_disable(adsp->cx_supply); +disable_clocks: + clk_disable_unprepare(adsp->xo); return ret; } @@ -223,6 +232,21 @@ static irqreturn_t adsp_stop_ack_interrupt(int irq, void *dev) return IRQ_HANDLED; } +static int adsp_init_clock(struct qcom_adsp *adsp) +{ + int ret; + + adsp->xo = devm_clk_get(adsp->dev, "xo"); + if (IS_ERR(adsp->xo)) { + ret = PTR_ERR(adsp->xo); + if (ret != -EPROBE_DEFER) + dev_err(adsp->dev, "failed to get xo clock"); + return ret; + } + + return 0; +} + static int adsp_init_regulator(struct qcom_adsp *adsp) { adsp->cx_supply = devm_regulator_get(adsp->dev, "cx"); @@ -320,6 +344,10 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto free_rproc; + ret = adsp_init_clock(adsp); + if (ret) + goto free_rproc; + ret = adsp_init_regulator(adsp); if (ret) goto free_rproc;