From patchwork Tue Aug 1 15:48:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 9874895 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E59DF60361 for ; Tue, 1 Aug 2017 15:55:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D569928068 for ; Tue, 1 Aug 2017 15:55:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CA21D28706; Tue, 1 Aug 2017 15:55:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 374EB286DA for ; Tue, 1 Aug 2017 15:55:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751697AbdHAPv5 (ORCPT ); Tue, 1 Aug 2017 11:51:57 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:54307 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751685AbdHAPuY (ORCPT ); Tue, 1 Aug 2017 11:50:24 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v71FmrYq005505; Tue, 1 Aug 2017 10:48:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1501602533; bh=rCc3sXx7d6xcZMwHU9flGeh1aR9F+8u/TjVmLksdi80=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NM+zU87WWQLi4OKIrTzV2ANeOfxzw0DmuZfdonB4K67Ozj5LkWGGK2Kgy3JJ4lZTB 20c1832Ta13btdM5lnI7EsHMM6pYoqojNeE8YDjDhVXO+IHZ2jy21WCC1TsqxuPr49 /Zl20pb8OGhjDzHuIHSPgCadLfGAsixfoM/9f7jQ= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v71Fmmmr001096; Tue, 1 Aug 2017 10:48:48 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Tue, 1 Aug 2017 10:48:48 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v71FmmiK020935; Tue, 1 Aug 2017 10:48:48 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v71Fmm323822; Tue, 1 Aug 2017 10:48:48 -0500 (CDT) From: Suman Anna To: Bjorn Andersson , Ohad Ben-Cohen , Rob Herring CC: Mark Rutland , , , Sekhar Nori , Robert Tivy , , , Suman Anna Subject: [PATCH v2 2/4] remoteproc/davinci: Add support to parse internal memories Date: Tue, 1 Aug 2017 10:48:42 -0500 Message-ID: <20170801154844.24662-3-s-anna@ti.com> X-Mailer: git-send-email 2.13.1 In-Reply-To: <20170801154844.24662-1-s-anna@ti.com> References: <20170801154844.24662-1-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The DSP subsystem on OMAP-L13x SoCs has various internal RAM memories that can accessed from the ARM side. These memories can be configured to be used as either RAM or Cache. The Davinci remoteproc driver has been enhanced to parse and store the kernel mappings for these internal RAM memories. These mappings can then be used to support direct loading of text/data into these memories from the remoteproc driver. Signed-off-by: Suman Anna --- v2: No code changes drivers/remoteproc/da8xx_remoteproc.c | 62 +++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/drivers/remoteproc/da8xx_remoteproc.c b/drivers/remoteproc/da8xx_remoteproc.c index 280b66d4f622..c1cff78de67b 100644 --- a/drivers/remoteproc/da8xx_remoteproc.c +++ b/drivers/remoteproc/da8xx_remoteproc.c @@ -38,9 +38,27 @@ MODULE_PARM_DESC(da8xx_fw_name, #define SYSCFG_CHIPSIG3 BIT(3) #define SYSCFG_CHIPSIG4 BIT(4) +#define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1) + +/** + * struct da8xx_rproc_mem - internal memory structure + * @cpu_addr: MPU virtual address of the memory region + * @bus_addr: Bus address used to access the memory region + * @dev_addr: Device address of the memory region from DSP view + * @size: Size of the memory region + */ +struct da8xx_rproc_mem { + void __iomem *cpu_addr; + phys_addr_t bus_addr; + u32 dev_addr; + size_t size; +}; + /** * struct da8xx_rproc - da8xx remote processor instance state * @rproc: rproc handle + * @mem: internal memory regions data + * @num_mems: number of internal memory regions * @dsp_clk: placeholder for platform's DSP clk * @ack_fxn: chip-specific ack function for ack'ing irq * @irq_data: ack_fxn function parameter @@ -50,6 +68,8 @@ MODULE_PARM_DESC(da8xx_fw_name, */ struct da8xx_rproc { struct rproc *rproc; + struct da8xx_rproc_mem *mem; + int num_mems; struct clk *dsp_clk; void (*ack_fxn)(struct irq_data *data); struct irq_data *irq_data; @@ -158,6 +178,44 @@ static const struct rproc_ops da8xx_rproc_ops = { .kick = da8xx_rproc_kick, }; +static int da8xx_rproc_get_internal_memories(struct platform_device *pdev, + struct da8xx_rproc *drproc) +{ + static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"}; + int num_mems = ARRAY_SIZE(mem_names); + struct device *dev = &pdev->dev; + struct resource *res; + int i; + + drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem), + GFP_KERNEL); + if (!drproc->mem) + return -ENOMEM; + + for (i = 0; i < num_mems; i++) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + mem_names[i]); + drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res); + if (IS_ERR(drproc->mem[i].cpu_addr)) { + dev_err(dev, "failed to parse and map %s memory\n", + mem_names[i]); + return PTR_ERR(drproc->mem[i].cpu_addr); + } + drproc->mem[i].bus_addr = res->start; + drproc->mem[i].dev_addr = + res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK; + drproc->mem[i].size = resource_size(res); + + dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", + mem_names[i], &drproc->mem[i].bus_addr, + drproc->mem[i].size, drproc->mem[i].cpu_addr, + drproc->mem[i].dev_addr); + } + drproc->num_mems = num_mems; + + return 0; +} + static int da8xx_rproc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -213,6 +271,10 @@ static int da8xx_rproc_probe(struct platform_device *pdev) drproc->dsp_clk = dsp_clk; rproc->has_iommu = false; + ret = da8xx_rproc_get_internal_memories(pdev, drproc); + if (ret) + goto free_rproc; + platform_set_drvdata(pdev, rproc); /* everything the ISR needs is now setup, so hook it up */