diff mbox series

[v3,3/7] dt-bindings: clock: qcom: Add QCOM WCSS GCC clock bindings

Message ID 20181215103557.2748-4-govinds@codeaurora.org (mailing list archive)
State New, archived
Headers show
Series Add non PAS wcss Q6 support for QCS404 | expand

Commit Message

Govind Singh Dec. 15, 2018, 10:35 a.m. UTC 
Add device tree bindings for WiFi QDSP gcc clock controls found in
QCS404 soc.

Signed-off-by: Govind Singh <govinds@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 include/dt-bindings/clock/qcom,gcc-qcs404.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Stephen Boyd Dec. 17, 2018, 7:34 p.m. UTC | #1 
Quoting Govind Singh (2018-12-15 02:35:53)
> Add device tree bindings for WiFi QDSP gcc clock controls found in
> QCS404 soc.
> 
> Signed-off-by: Govind Singh <govinds@codeaurora.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  include/dt-bindings/clock/qcom,gcc-qcs404.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h
> index 00ab0d77b38a..8f800adda225 100644
> --- a/include/dt-bindings/clock/qcom,gcc-qcs404.h
> +++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h
> @@ -146,6 +146,8 @@
>  #define GCC_MDP_TBU_CLK                                        138
>  #define GCC_QDSS_DAP_CLK                               139
>  #define GCC_DCC_XO_CLK                                 140
> +#define GCC_WCSS_Q6_AHB_CBCR_CLK                       141
> +#define GCC_WCSS_Q6_AXIM_CBCR_CLK                      142

Does the register really call it FOO_CBCR_CLK? I'd prefer we drop the
CBCR part unless you really want it to keep it.

>  
>  #define GCC_GENI_IR_BCR                                        0
>  #define GCC_USB_HS_BCR                                 1
Govind Singh Feb. 2, 2019, 3:33 p.m. UTC | #2 
On 2018-12-18 01:04, Stephen Boyd wrote:
> Quoting Govind Singh (2018-12-15 02:35:53)
>> Add device tree bindings for WiFi QDSP gcc clock controls found in
>> QCS404 soc.
>> 
>> Signed-off-by: Govind Singh <govinds@codeaurora.org>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> ---
>>  include/dt-bindings/clock/qcom,gcc-qcs404.h | 3 +++
>>  1 file changed, 3 insertions(+)
>> 
>> diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h 
>> b/include/dt-bindings/clock/qcom,gcc-qcs404.h
>> index 00ab0d77b38a..8f800adda225 100644
>> --- a/include/dt-bindings/clock/qcom,gcc-qcs404.h
>> +++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h
>> @@ -146,6 +146,8 @@
>>  #define GCC_MDP_TBU_CLK                                        138
>>  #define GCC_QDSS_DAP_CLK                               139
>>  #define GCC_DCC_XO_CLK                                 140
>> +#define GCC_WCSS_Q6_AHB_CBCR_CLK                       141
>> +#define GCC_WCSS_Q6_AXIM_CBCR_CLK                      142
> 
> Does the register really call it FOO_CBCR_CLK? I'd prefer we drop the
> CBCR part unless you really want it to keep it.
> 

Thanks, removed CBCR in v4.

>> 
>>  #define GCC_GENI_IR_BCR                                        0
>>  #define GCC_USB_HS_BCR                                 1
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h
index 00ab0d77b38a..8f800adda225 100644
--- a/include/dt-bindings/clock/qcom,gcc-qcs404.h
+++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h
@@ -146,6 +146,8 @@ 
 #define GCC_MDP_TBU_CLK					138
 #define GCC_QDSS_DAP_CLK				139
 #define GCC_DCC_XO_CLK					140
+#define GCC_WCSS_Q6_AHB_CBCR_CLK			141
+#define GCC_WCSS_Q6_AXIM_CBCR_CLK			142
 
 #define GCC_GENI_IR_BCR					0
 #define GCC_USB_HS_BCR					1
@@ -168,5 +170,6 @@ 
 #define GCC_PCIE_0_CORE_STICKY_ARES			18
 #define GCC_PCIE_0_SLEEP_ARES				19
 #define GCC_PCIE_0_PIPE_ARES				20
+#define GCC_WDSP_RESTART				21
 
 #endif