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Wed, 26 Aug 2020 18:58:11 -0700 Received: from [172.19.2.206] (helo=xsjblevinsk50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1kB7B4-000155-SY; Wed, 26 Aug 2020 18:58:10 -0700 From: Ben Levinsky To: stefano.stabellini@xilinx.com, michals@xilinx.com, michael.auchter@ni.com Cc: devicetree@vger.kernel.org, mathieu.poirier@linaro.org, emooring@xilinx.com, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, jliang@xilinx.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v10 4/5] dt-bindings: remoteproc: Add documentation for ZynqMP R5 rproc bindings Date: Wed, 26 Aug 2020 18:58:09 -0700 Message-Id: <20200827015810.11157-5-ben.levinsky@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827015810.11157-1-ben.levinsky@xilinx.com> References: <20200827015810.11157-1-ben.levinsky@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 05e512b7-5fda-4c62-1078-08d84a2ca97f X-MS-TrafficTypeDiagnostic: BN6PR02MB2451: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:9508; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2020 01:58:15.5318 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 05e512b7-5fda-4c62-1078-08d84a2ca97f X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT032.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR02MB2451 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Add binding for ZynqMP R5 OpenAMP. Represent the RPU domain resources in one device node. Each RPU processor is a subnode of the top RPU domain node. Signed-off-by: Ben Levinsky Signed-off-by: Jason Wu Signed-off-by: Wendy Liang Signed-off-by: Michal Simek --- v3: - update zynqmp_r5 yaml parsing to not raise warnings for extra information in children of R5 node. The warning "node has a unit name, but no reg or ranges property" will still be raised though as this particular node is needed to describe the '#address-cells' and '#size-cells' information. v4:: - remove warning '/example-0/rpu@ff9a0000/r5@0: node has a unit name, but no reg or ranges property' by adding reg to r5 node. v5: - update device tree sample and yaml parsing to not raise any warnings - description for memory-region in yaml parsing - compatible string in yaml parsing for TCM v6: - remove coupling TCM nodes with remoteproc - remove mailbox as it is optional not needed v7: - change lockstep-mode to xlnx,cluster-mode v9: - show example IPC nodes and tcm bank nodes --- .../xilinx,zynqmp-r5-remoteproc.yaml | 113 ++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml new file mode 100644 index 000000000000..f4a28831af6c --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Xilinx R5 remote processor controller bindings + +description: + This document defines the binding for the remoteproc component that loads and + boots firmwares on the Xilinx Zynqmp and Versal family chipset. + + Note that the Linux has global addressing view of the R5-related memory (TCM) + so the absolute address ranges are provided in TCM reg's. +maintainers: + - Ed Mooring + - Ben Levinsky + +properties: + compatible: + const: "xlnx,zynqmp-r5-remoteproc-1.0" + + lockstep-mode: + description: + R5 core configuration (split is 0 or lock-step and 1) + maxItems: 1 + + interrupts: + description: + Interrupt mapping for remoteproc IPI. It is required if the + user uses the remoteproc driver with the RPMsg kernel driver. + maxItems: 6 + + memory-region: + description: + collection of memory carveouts used for elf-loading and inter-processor + communication. + maxItems: 4 + minItems: 4 + pnode-id: + maxItems: 1 + mboxes: + maxItems: 2 + mbox-names: + maxItems: 2 + +examples: + - | + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + elf_load: rproc@3ed000000 { + no-map; + reg = <0x3ed00000 0x40000>; + }; + }; + rpu { + compatible = "xlnx,zynqmp-r5-remoteproc-1.0"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + lockstep-mode = <0>; + r5_0 { + ranges; + #address-cells = <1>; + #size-cells = <1>; + memory-region = <&elf_load>; + pnode-id = <0x7>; + }; + }; + + /* + * Below nodes are required if using TCM to load R5 firmware + * if not, then either do not provide nodes are label as disabled in + * status property + */ + tcm_0a@0 { + reg = <0x0 0xffe00000 0x0 0x10000>; + pnode-id = <0xf>; + no-map; + status = "okay"; + }; + tcm_1a@0 { + reg = <0x0 0xffe20000 0x0 0x10000>; + pnode-id = <0x10>; + no-map; + status = "okay"; + }; + + /* + * Below nodes are required for IPC, as Xilinx Kernel + * can potentially have other applications that use CMA + * and conflict from hardware design. With that in mind, + * explicitly state the address spaces for the IPC remoteproc + * mechanisms. + * + * If IPC not required and only elf-loading then these are not needed. + */ + rpu0vdev0vring0: rpu0vdev0vring0@3ed40000 { + no-map; + reg = <0x0 0x3ed40000 0x0 0x4000>; + }; + rpu0vdev0vring1: rpu0vdev0vring1@3ed44000 { + no-map; + reg = <0x0 0x3ed44000 0x0 0x4000>; + }; + rpu0vdev0buffer: rpu0vdev0buffer@3ed48000 { + no-map; + reg = <0x0 0x3ed48000 0x0 0x100000>; + }; + +...