diff mbox series

[v24,1/5] firmware: xilinx: Add ZynqMP firmware ioctl enums for RPU configuration.

Message ID 20201130155717.26008-2-ben.levinsky@xilinx.com (mailing list archive)
State Superseded
Headers show
Series Provide basic driver to control Arm R5 co-processor found on Xilinx ZynqMP | expand

Commit Message

Ben Levinsky Nov. 30, 2020, 3:57 p.m. UTC
Add ZynqMP firmware ioctl enums for RPU configuration and TCM Nodes for
later use via request_node and release_node

Signed-off-by: Ben Levinsky <ben.levinsky@xilinx.com>
---
 include/linux/firmware/xlnx-zynqmp.h | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

Comments

Michal Simek Dec. 14, 2020, 11:52 a.m. UTC | #1
On 30. 11. 20 16:57, Ben Levinsky wrote:
> Add ZynqMP firmware ioctl enums for RPU configuration and TCM Nodes for
> later use via request_node and release_node
> 
> Signed-off-by: Ben Levinsky <ben.levinsky@xilinx.com>
> ---
>  include/linux/firmware/xlnx-zynqmp.h | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 5968df82b991..0dd2d188f8aa 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -104,6 +104,10 @@ enum pm_ret_status {
>  };
>  
>  enum pm_ioctl_id {
> +	IOCTL_GET_RPU_OPER_MODE = 0,
> +	IOCTL_SET_RPU_OPER_MODE = 1,
> +	IOCTL_RPU_BOOT_ADDR_CONFIG = 2,
> +	IOCTL_TCM_COMB_CONFIG = 3,
>  	IOCTL_SD_DLL_RESET = 6,
>  	IOCTL_SET_SD_TAPDELAY,
>  	IOCTL_SET_PLL_FRAC_MODE,
> @@ -129,6 +133,21 @@ enum pm_query_id {
>  	PM_QID_CLOCK_GET_MAX_DIVISOR,
>  };
>  
> +enum rpu_oper_mode {
> +	PM_RPU_MODE_LOCKSTEP = 0,
> +	PM_RPU_MODE_SPLIT = 1,
> +};
> +
> +enum rpu_boot_mem {
> +	PM_RPU_BOOTMEM_LOVEC = 0,
> +	PM_RPU_BOOTMEM_HIVEC = 1,
> +};
> +
> +enum rpu_tcm_comb {
> +	PM_RPU_TCM_SPLIT = 0,
> +	PM_RPU_TCM_COMB = 1,
> +};
> +
>  enum zynqmp_pm_reset_action {
>  	PM_RESET_ACTION_RELEASE,
>  	PM_RESET_ACTION_ASSERT,
> @@ -273,6 +292,10 @@ enum zynqmp_pm_request_ack {
>  };
>  
>  enum pm_node_id {
> +	NODE_TCM_0_A = 0xf,
> +	NODE_TCM_0_B = 0x10,
> +	NODE_TCM_1_A = 0x11,
> +	NODE_TCM_1_B = 0x12,

Please convert these hex to int to be aligned with the rest.

>  	NODE_SD_0 = 39,
>  	NODE_SD_1,
>  };
> 

When that fixed feel free to add.
Acked-by: Michal Simek <michal.simek@xilinx.com>

Thanks,
Michal
diff mbox series

Patch

diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 5968df82b991..0dd2d188f8aa 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -104,6 +104,10 @@  enum pm_ret_status {
 };
 
 enum pm_ioctl_id {
+	IOCTL_GET_RPU_OPER_MODE = 0,
+	IOCTL_SET_RPU_OPER_MODE = 1,
+	IOCTL_RPU_BOOT_ADDR_CONFIG = 2,
+	IOCTL_TCM_COMB_CONFIG = 3,
 	IOCTL_SD_DLL_RESET = 6,
 	IOCTL_SET_SD_TAPDELAY,
 	IOCTL_SET_PLL_FRAC_MODE,
@@ -129,6 +133,21 @@  enum pm_query_id {
 	PM_QID_CLOCK_GET_MAX_DIVISOR,
 };
 
+enum rpu_oper_mode {
+	PM_RPU_MODE_LOCKSTEP = 0,
+	PM_RPU_MODE_SPLIT = 1,
+};
+
+enum rpu_boot_mem {
+	PM_RPU_BOOTMEM_LOVEC = 0,
+	PM_RPU_BOOTMEM_HIVEC = 1,
+};
+
+enum rpu_tcm_comb {
+	PM_RPU_TCM_SPLIT = 0,
+	PM_RPU_TCM_COMB = 1,
+};
+
 enum zynqmp_pm_reset_action {
 	PM_RESET_ACTION_RELEASE,
 	PM_RESET_ACTION_ASSERT,
@@ -273,6 +292,10 @@  enum zynqmp_pm_request_ack {
 };
 
 enum pm_node_id {
+	NODE_TCM_0_A = 0xf,
+	NODE_TCM_0_B = 0x10,
+	NODE_TCM_1_A = 0x11,
+	NODE_TCM_1_B = 0x12,
 	NODE_SD_0 = 39,
 	NODE_SD_1,
 };