| Message ID | 20210108081738.2175224-3-tzungbi@google.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | remoteproc/mediatek: support L1TCM for MT8192 SCP | expand |
diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 988edb4977c3..661c998288d7 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -47,6 +47,7 @@ #define MT8192_CORE0_SW_RSTN_CLR 0x10000 #define MT8192_CORE0_SW_RSTN_SET 0x10004 +#define MT8192_CORE0_MEM_ATT_PREDEF 0x10008 #define MT8192_CORE0_WDT_CFG 0x10034 #define SCP_FW_VER_LEN 32 diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 1f0ed2974d5c..c33c41fe54cd 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -369,6 +369,9 @@ static int mt8192_scp_before_load(struct mtk_scp *scp) mt8192_power_on_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN); mt8192_power_on_sram(scp->reg_base + MT8192_CPU0_SRAM_PD); + /* enable MPU for all memory regions */ + writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); + return 0; }
The register MT8192_CORE0_MEM_ATT_PREDEF contains attributes for each memory region. It defines whether a memory region can be managed by MPU or not. In the past, due to the default settings in the register, MT8192 SCP works luckily. After enabling L1TCM, SCP starts to access memory region that is not included in the default settings. As a result, SCP hangs. Enables MPU for all memory regions in MT8192 SCP. Note that the register is read only once when SCP resets. Thus, it must be set from kernel side. Fixes: fd0b6c1ff85a ("remoteproc/mediatek: Add support for mt8192 SCP") Cc: <stable@vger.kernel.org> # v5.10+ Signed-off-by: Tzung-Bi Shih <tzungbi@google.com> --- Changes from previous version[1]: - Adds Fixes and Cc tags. [1]: https://patchwork.kernel.org/project/linux-remoteproc/list/?series=410291 drivers/remoteproc/mtk_common.h | 1 + drivers/remoteproc/mtk_scp.c | 3 +++ 2 files changed, 4 insertions(+)