| Message ID | 20220817131415.714340-5-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ARM/hwlock: qcom: switch TCSR mutex to MMIO | expand |
On 17.08.2022 15:14, Krzysztof Kozlowski wrote: > Newer ARMv8 Qualcomm SoCs using 0x1000 register stride have maximum > register 0x20000 (32 mutexes * 0x1000). > > Fixes: 7a1e6fb1c606 ("hwspinlock: qcom: Allow mmio usage in addition to syscon") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Konrad > drivers/hwspinlock/qcom_hwspinlock.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/hwspinlock/qcom_hwspinlock.c b/drivers/hwspinlock/qcom_hwspinlock.c > index 80ea45b3a815..9734e149d981 100644 > --- a/drivers/hwspinlock/qcom_hwspinlock.c > +++ b/drivers/hwspinlock/qcom_hwspinlock.c > @@ -121,7 +121,7 @@ static const struct regmap_config tcsr_mutex_config = { > .reg_bits = 32, > .reg_stride = 4, > .val_bits = 32, > - .max_register = 0x40000, > + .max_register = 0x20000, > .fast_io = true, > }; >
diff --git a/drivers/hwspinlock/qcom_hwspinlock.c b/drivers/hwspinlock/qcom_hwspinlock.c index 80ea45b3a815..9734e149d981 100644 --- a/drivers/hwspinlock/qcom_hwspinlock.c +++ b/drivers/hwspinlock/qcom_hwspinlock.c @@ -121,7 +121,7 @@ static const struct regmap_config tcsr_mutex_config = { .reg_bits = 32, .reg_stride = 4, .val_bits = 32, - .max_register = 0x40000, + .max_register = 0x20000, .fast_io = true, };
Newer ARMv8 Qualcomm SoCs using 0x1000 register stride have maximum register 0x20000 (32 mutexes * 0x1000). Fixes: 7a1e6fb1c606 ("hwspinlock: qcom: Allow mmio usage in addition to syscon") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- drivers/hwspinlock/qcom_hwspinlock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)