| Message ID | 20240621114659.2958170-9-quic_gokulsri@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | remoteproc: qcom: q6v5-wcss: Add support for secure pil | expand |
On 21/06/2024 13:46, Gokul Sriram Palanisamy wrote: > Enable remoteproc WCSS PIL driver with glink. Also, > configure shared memory and enables smp2p required for IPC. > > Signed-off-by: Nikhil Prakash V <quic_nprakash@quicinc.com> > Signed-off-by: Sricharan R <quic_srichara@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> > --- > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 80 +++++++++++++++++++++++++++ > 1 file changed, 80 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > index 92682d3c9478..b98766cce0d6 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -108,6 +108,12 @@ memory@4ac00000 { > reg = <0x0 0x4ac00000 0x0 0x400000>; > no-map; > }; > + > + q6_region: memory@4b000000 { > + no-map; > + reg = <0x0 0x4b000000 0x0 0x5f00000>; > + }; > + > }; > > firmware { > @@ -117,6 +123,30 @@ scm { > }; > }; > > + wcss: smp2p-wcss { > + compatible = "qcom,smp2p"; > + qcom,smem = <435>, <428>; > + > + interrupt-parent = <&intc>; > + interrupts = <GIC_SPI 322 IRQ_TYPE_EDGE_RISING>; > + > + mboxes = <&apcs_glb 9>; > + > + qcom,local-pid = <0>; > + qcom,remote-pid = <1>; > + > + wcss_smp2p_out: master-kernel { > + qcom,entry-name = "master-kernel"; > + #qcom,smem-state-cells = <1>; > + }; > + > + wcss_smp2p_in: slave-kernel { > + qcom,entry-name = "slave-kernel"; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + }; > + > soc: soc@0 { > #address-cells = <1>; > #size-cells = <1>; > @@ -824,6 +854,56 @@ frame@b128000 { > }; > }; > > + q6v5_wcss: remoteproc@cd00000 { > + compatible = "qcom,ipq8074-wcss-pil"; > + reg = <0x0cd00000 0x4040>, > + <0x004ab000 0x20>; > + reg-names = "qdsp6", > + "rmb"; > + qca,auto-restart; > + qca,extended-intc; > + interrupts-extended = <&intc 0 325 1>, > + <&wcss_smp2p_in 0 0>, > + <&wcss_smp2p_in 1 0>, > + <&wcss_smp2p_in 2 0>, > + <&wcss_smp2p_in 3 0>; > + interrupt-names = "wdog", > + "fatal", > + "ready", > + "handover", > + "stop-ack"; > + > + resets = <&gcc GCC_WCSSAON_RESET>, > + <&gcc GCC_WCSS_BCR>, > + <&gcc GCC_WCSS_Q6_BCR>; > + > + reset-names = "wcss_aon_reset", > + "wcss_reset", > + "wcss_q6_reset"; > + > + clocks = <&gcc GCC_PRNG_AHB_CLK>; > + clock-names = "prng"; That's not what your binding is saying. Convert the binding to DT schema and then validate this DTS. Best regards, Krzysztof
On 6/21/2024 5:16 PM, Gokul Sriram Palanisamy wrote: > Enable remoteproc WCSS PIL driver with glink. Also, > configure shared memory and enables smp2p required for IPC. > > Signed-off-by: Nikhil Prakash V <quic_nprakash@quicinc.com> > Signed-off-by: Sricharan R <quic_srichara@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> > --- > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 80 +++++++++++++++++++++++++++ > 1 file changed, 80 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > index 92682d3c9478..b98766cce0d6 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -108,6 +108,12 @@ memory@4ac00000 { > reg = <0x0 0x4ac00000 0x0 0x400000>; > no-map; > }; > + > + q6_region: memory@4b000000 { > + no-map; move the no-map after reg, to align with other entries. > + reg = <0x0 0x4b000000 0x0 0x5f00000>; > + }; > + > }; > > firmware { > @@ -117,6 +123,30 @@ scm { > }; > }; > ... > > + q6v5_wcss: remoteproc@cd00000 { > + compatible = "qcom,ipq8074-wcss-pil"; > + reg = <0x0cd00000 0x4040>, > + <0x004ab000 0x20>; > + reg-names = "qdsp6", > + "rmb"; > + qca,auto-restart; > + qca,extended-intc; > + interrupts-extended = <&intc 0 325 1>, Use macros instead of open coding. > + <&wcss_smp2p_in 0 0>, > + <&wcss_smp2p_in 1 0>, > + <&wcss_smp2p_in 2 0>, > + <&wcss_smp2p_in 3 0>; > + interrupt-names = "wdog", > + "fatal", > + "ready", > + "handover", > + "stop-ack"; > + > + resets = <&gcc GCC_WCSSAON_RESET>, > + <&gcc GCC_WCSS_BCR>, > + <&gcc GCC_WCSS_Q6_BCR>; > + > + reset-names = "wcss_aon_reset", > + "wcss_reset", > + "wcss_q6_reset"; > + > + clocks = <&gcc GCC_PRNG_AHB_CLK>; > + clock-names = "prng"; > + > + qcom,halt-regs = <&tcsr 0xa000 0xd000 0xe000>; > + > + qcom,smem-states = <&wcss_smp2p_out 0>, > + <&wcss_smp2p_out 1>; > + qcom,smem-state-names = "shutdown", > + "stop"; > + > + memory-region = <&q6_region>; > + > + glink-edge { > + interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>; > + qcom,remote-pid = <1>; > + mboxes = <&apcs_glb 8>; > + > + rpm_requests { > + qcom,glink-channels = "rpm_requests"; > + }; > + }; > + }; > + > pcie1: pcie@10000000 { > compatible = "qcom,pcie-ipq8074"; > reg = <0x10000000 0xf1d>,
Hi Gokul, kernel test robot noticed the following build warnings: [auto build test WARNING on remoteproc/rproc-next] [also build test WARNING on clk/clk-next robh/for-next linus/master v6.10-rc5 next-20240626] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Gokul-Sriram-Palanisamy/remoteproc-qcom-Add-PRNG-proxy-clock/20240625-162317 base: git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git rproc-next patch link: https://lore.kernel.org/r/20240621114659.2958170-9-quic_gokulsri%40quicinc.com patch subject: [PATCH v9 8/8] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC config: arm64-randconfig-051-20240627 (https://download.01.org/0day-ci/archive/20240627/202406272012.krpg0wbC-lkp@intel.com/config) compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project ad79a14c9e5ec4a369eed4adf567c22cc029863f) dtschema version: 2024.6.dev1+g833054f reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240627/202406272012.krpg0wbC-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202406272012.krpg0wbC-lkp@intel.com/ dtcheck warnings: (new ones prefixed by >>) arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb: phy@59000: 'vdda-pll-supply' is a required property from schema $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml# arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb: phy@59000: 'vdda-phy-dpdm-supply' is a required property from schema $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml# arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb: phy@79000: 'vdd-supply' is a required property from schema $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml# arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb: phy@79000: 'vdda-pll-supply' is a required property from schema $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml# arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb: phy@79000: 'vdda-phy-dpdm-supply' is a required property from schema $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml# >> arch/arm64/boot/dts/qcom/ipq8074-hk01.dtb: /soc@0/remoteproc@cd00000: failed to match any schema with compatible: ['qcom,ipq8074-wcss-pil'] -- >> arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dtb: /soc@0/remoteproc@cd00000: failed to match any schema with compatible: ['qcom,ipq8074-wcss-pil'] -- >> arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: /soc@0/remoteproc@cd00000: failed to match any schema with compatible: ['qcom,ipq8074-wcss-pil']
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 92682d3c9478..b98766cce0d6 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -108,6 +108,12 @@ memory@4ac00000 { reg = <0x0 0x4ac00000 0x0 0x400000>; no-map; }; + + q6_region: memory@4b000000 { + no-map; + reg = <0x0 0x4b000000 0x0 0x5f00000>; + }; + }; firmware { @@ -117,6 +123,30 @@ scm { }; }; + wcss: smp2p-wcss { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + + interrupt-parent = <&intc>; + interrupts = <GIC_SPI 322 IRQ_TYPE_EDGE_RISING>; + + mboxes = <&apcs_glb 9>; + + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + wcss_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + wcss_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + soc: soc@0 { #address-cells = <1>; #size-cells = <1>; @@ -824,6 +854,56 @@ frame@b128000 { }; }; + q6v5_wcss: remoteproc@cd00000 { + compatible = "qcom,ipq8074-wcss-pil"; + reg = <0x0cd00000 0x4040>, + <0x004ab000 0x20>; + reg-names = "qdsp6", + "rmb"; + qca,auto-restart; + qca,extended-intc; + interrupts-extended = <&intc 0 325 1>, + <&wcss_smp2p_in 0 0>, + <&wcss_smp2p_in 1 0>, + <&wcss_smp2p_in 2 0>, + <&wcss_smp2p_in 3 0>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + resets = <&gcc GCC_WCSSAON_RESET>, + <&gcc GCC_WCSS_BCR>, + <&gcc GCC_WCSS_Q6_BCR>; + + reset-names = "wcss_aon_reset", + "wcss_reset", + "wcss_q6_reset"; + + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "prng"; + + qcom,halt-regs = <&tcsr 0xa000 0xd000 0xe000>; + + qcom,smem-states = <&wcss_smp2p_out 0>, + <&wcss_smp2p_out 1>; + qcom,smem-state-names = "shutdown", + "stop"; + + memory-region = <&q6_region>; + + glink-edge { + interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>; + qcom,remote-pid = <1>; + mboxes = <&apcs_glb 8>; + + rpm_requests { + qcom,glink-channels = "rpm_requests"; + }; + }; + }; + pcie1: pcie@10000000 { compatible = "qcom,pcie-ipq8074"; reg = <0x10000000 0xf1d>,