From patchwork Mon Jul 30 17:20:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 10549489 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A327513BB for ; Mon, 30 Jul 2018 17:20:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8940B2A459 for ; Mon, 30 Jul 2018 17:20:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7D9E52A465; Mon, 30 Jul 2018 17:20:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E32922A425 for ; Mon, 30 Jul 2018 17:20:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726782AbeG3S41 (ORCPT ); Mon, 30 Jul 2018 14:56:27 -0400 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:57897 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726752AbeG3S41 (ORCPT ); Mon, 30 Jul 2018 14:56:27 -0400 X-Originating-IP: 2.224.242.101 Received: from w540.lan (2-224-242-101.ip172.fastwebnet.it [2.224.242.101]) (Authenticated sender: jacopo@jmondi.org) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 4E745E000D; Mon, 30 Jul 2018 17:20:26 +0000 (UTC) From: Jacopo Mondi To: Laurent Pinchart , David Airlie Cc: Jacopo Mondi , dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR RENESAS), linux-renesas-soc@vger.kernel.org (open list:DRM DRIVERS FOR RENESAS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 0/3] drm: rcar-du: Rework clock configuration Date: Mon, 30 Jul 2018 19:20:11 +0200 Message-Id: <1532971214-17962-1-git-send-email-jacopo@jmondi.org> X-Mailer: git-send-email 2.7.4 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hello this series improves the DU peripheral input clock selection procedure, fixing high-resolution modes for non-DPLL channels, as DPAD and LVDS ones. The first patch in the series is a rework from Laurent of the clock selection procedure, clearly separating DPLL equipped channels from channels only equipped with an interanl divider. The non-DPLL channels clock input selection procedure is improved in patch [3/3] by exploiting the external clock source ability to generate the desired pixel clock (when possible). This improvements is sparkled from the following BSP patch https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/ ?id=32e9be612773ce0ed75295a10764151633938528 that un-conditionally uses the externally generated clock source as output pixel clock. Tested on M3-W Salvator-X board and VGA output: fixes 1920x1080 display. Jacopo Mondi (2): drm: rcar-du: Rename var to a more precise name drm: rcar-du: Improve non-DPLL clock selection Laurent Pinchart (1): drm: rcar-du: Rework clock configuration based on hardware limits drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 182 ++++++++++++++++++++++----------- 1 file changed, 122 insertions(+), 60 deletions(-) --- 2.7.4