From patchwork Fri Aug 17 13:19:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 10568759 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6F6F21390 for ; Fri, 17 Aug 2018 13:22:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 59620256E6 for ; Fri, 17 Aug 2018 13:22:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4AE3F2621E; Fri, 17 Aug 2018 13:22:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5DC582B7F5 for ; Fri, 17 Aug 2018 13:22:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725879AbeHQQ0O (ORCPT ); Fri, 17 Aug 2018 12:26:14 -0400 Received: from mo4-p02-ob.smtp.rzone.de ([85.215.255.84]:20256 "EHLO mo4-p02-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725800AbeHQQ0O (ORCPT ); Fri, 17 Aug 2018 12:26:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1534512169; s=strato-dkim-0002; d=fpond.eu; h=Message-Id:Date:Subject:Cc:To:From:X-RZG-CLASS-ID:X-RZG-AUTH:From: Subject:Sender; bh=IdtSIei8wNAA66CSZHmAkcRMZ/Bpqe2d2vXveBiY9yo=; b=EAosPZ/fwtboHkjNuwZX0NYNIJp0Hw1TB4Y/rK7jfYaMZvY6RNbQNmdbNLQ3kkmZcm BMtl0IRlE+ei2i47wqOGjsu4buPveC/x7PdX6KczhD/TlRaihF5AfILTuvHtb1OKMZNt A8O7jOdt4CZtzxkPMLlpeJ1s/OssfFTUbiGJcSOFcmtDHjZk+Ou/0myzKBCDD2kaXfvW rizn4Jl7kRV8dE96D1Mmk6pH2CQtp7cq70sM4s/vvKi20bDVilq+lbyfluaXsvCUP5pC 8XqbppsTQY+k3e8aHZgsSgDkoL0csjs8CAWx733RUPIWfdDtGba16Qm9lv0Do5t89C8g kpFw== X-RZG-AUTH: ":OWANVUa4dPFUgKR/3dpvnYP0Np73dmm4I5W0/AvJ5qUpzBvsMmfMQqXtRAup" X-RZG-CLASS-ID: mo00 Received: from groucho.site by smtp.strato.de (RZmta 43.18 DYNA|AUTH) with ESMTPSA id w02b1cu7HDJW9wM (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Fri, 17 Aug 2018 15:19:32 +0200 (CEST) From: Ulrich Hecht To: linux-renesas-soc@vger.kernel.org Cc: horms@verge.net.au, geert@linux-m68k.org, khiem.nguyen.xt@rvc.renesas.com, dien.pham.ry@renesas.com, takeshi.kihara.df@renesas.com, Ulrich Hecht Subject: [PATCH 0/5] H3/M3-W cpuidle support Date: Fri, 17 Aug 2018 15:19:23 +0200 Message-Id: <1534511968-19634-1-git-send-email-uli+renesas@fpond.eu> X-Mailer: git-send-email 2.7.4 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi! This series adds CPU idle support for H3 and M3-W. It's a straight up-port from the BSP. The part that disables cpuidle for the CA53 cores on M3ULCB is a bit dodgy. Is it a valid assumption that all M3ULCB boards have an ES1.0 SoC? CU Uli Dien Pham (2): arm64: dts: r8a7795: Add cpuidle support for CA53 cores arm64: dts: r8a7796: Add cpuidle support for CA53 cores Khiem Nguyen (2): arm64: dts: r8a7795: Add cpuidle support for CA57 cores arm64: dts: r8a7796: Add cpuidle support for CA57 cores Takeshi Kihara (1): arm64: dts: r8a7796-m3ulcb: Disable cpuidle support for CA53 cores arch/arm64/boot/dts/renesas/r8a7795.dtsi | 32 ++++++++++++++++++++++++++ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 22 ++++++++++++++++++ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 30 ++++++++++++++++++++++++ 3 files changed, 84 insertions(+)