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[0/4] drm: rcar-du: Update to SoC manual revision 1.00

Message ID 1535037134-373-1-git-send-email-jacopo+renesas@jmondi.org (mailing list archive)
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Series drm: rcar-du: Update to SoC manual revision 1.00 | expand

Message

Jacopo Mondi Aug. 23, 2018, 3:12 p.m. UTC
Hello Laurent,
   Revision 1.00 has brought several updates on how to handle some registers
in the DU. In particular

- ESCR cannot be written for channels with a DPLL
- OTAR cannot be written for channels without a digital output pad
- routing superimposition processor output to pincontrollers through DORCR2
  register cannot be performed for channels of group 1
- The plane super-imposition register PnMR can be written to groups with more
  than 1 channel.

Patches applied on top of your latest drm/du/next branch.

Tested on Salvator-X M3-W with VGA and HDMI output.
Tested on Salvator-XS M3-N with VGA and HDMI output.
No visible regression, but if you have ideas on how to better verify this
please let me know.

Thanks
   j

Jacopo Mondi (4):
  drm: rcar-du: Do not write ESCR for DPLL channels
  drm: rcar-du: Write OTAR for DPAD channels only
  drm: rcar-du: Fix handling of DORCR for group 1
  drm: rcar-du: Fix handling of PnMR register

 drivers/gpu/drm/rcar-du/rcar_du_crtc.c  | 18 +++++++++++-------
 drivers/gpu/drm/rcar-du/rcar_du_group.c | 19 ++++++++++++++++---
 drivers/gpu/drm/rcar-du/rcar_du_plane.c | 13 +++++++++++--
 3 files changed, 38 insertions(+), 12 deletions(-)

--
2.7.4

Comments

Jacopo Mondi Sept. 14, 2018, 1:58 p.m. UTC | #1
Hi Laurent,

On Thu, Aug 23, 2018 at 05:12:10PM +0200, Jacopo Mondi wrote:
> Hello Laurent,
>    Revision 1.00 has brought several updates on how to handle some registers
> in the DU. In particular
>
> - ESCR cannot be written for channels with a DPLL
> - OTAR cannot be written for channels without a digital output pad
> - routing superimposition processor output to pincontrollers through DORCR2
>   register cannot be performed for channels of group 1
> - The plane super-imposition register PnMR can be written to groups with more
>   than 1 channel.
>
> Patches applied on top of your latest drm/du/next branch.

Could you please consider including this series in your tree?

Thanks
  j
>
> Tested on Salvator-X M3-W with VGA and HDMI output.
> Tested on Salvator-XS M3-N with VGA and HDMI output.
> No visible regression, but if you have ideas on how to better verify this
> please let me know.
>
> Thanks
>    j
>
> Jacopo Mondi (4):
>   drm: rcar-du: Do not write ESCR for DPLL channels
>   drm: rcar-du: Write OTAR for DPAD channels only
>   drm: rcar-du: Fix handling of DORCR for group 1
>   drm: rcar-du: Fix handling of PnMR register
>
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c  | 18 +++++++++++-------
>  drivers/gpu/drm/rcar-du/rcar_du_group.c | 19 ++++++++++++++++---
>  drivers/gpu/drm/rcar-du/rcar_du_plane.c | 13 +++++++++++--
>  3 files changed, 38 insertions(+), 12 deletions(-)
>
> --
> 2.7.4
>