[v2,0/4] clk: renesas: cpg-mssr: add support for V3U

Message

Yoshihiro Shimoda Sept. 9, 2020, 1:13 p.m. UTC

This patch series is like incremental patches from the following
series.

 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=344457

And, this patch series fix patch 7/14 and 12/14 of
the previous patch series. In other words, I don't include
the patch 6/14 because it already got Reviewed-by [1].
https://patchwork.kernel.org/patch/11760285/

Changes from v1:
 - Fix subject in the patch 1.
 - Remove unused/unexist definitions in the patch 1.
 - Fix the SPDX in the patch 1.
 - Use enum instead of bool flag, so I made additional new patches as
   patch 2 and 3.
 - Remove z clocks handling in the patch 4.
 - Use share PLL[23][01] clock types in the patch 4.
 - Fix alignment of r8a779a0_core_clks in the patch 4.
 - Use rcar-gen3-cpg.h in the patch 4.
 - Remove r8a779a0_crit_mod_clks in the patch 4.
 - Fix .num_hw_mod_clks in the patch 4. 

Yoshihiro Shimoda (4):
  dt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions
  clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean
    flag
  clk: renesas: cpg-mssr: add register pointers into struct
    cpg_mssr_priv
  clk: renesas: cpg-mssr: Add support for R-Car V3U

 drivers/clk/renesas/Kconfig                   |   5 +
 drivers/clk/renesas/Makefile                  |   1 +
 drivers/clk/renesas/r7s9210-cpg-mssr.c        |   2 +-
 drivers/clk/renesas/r8a779a0-cpg-mssr.c       | 281 ++++++++++++++++++++++++++
 drivers/clk/renesas/renesas-cpg-mssr.c        | 100 +++++----
 drivers/clk/renesas/renesas-cpg-mssr.h        |   9 +-
 include/dt-bindings/clock/r8a779a0-cpg-mssr.h |  55 +++++
 7 files changed, 413 insertions(+), 40 deletions(-)
 create mode 100644 drivers/clk/renesas/r8a779a0-cpg-mssr.c
 create mode 100644 include/dt-bindings/clock/r8a779a0-cpg-mssr.h