[0/2] sh73a0 CMT1 test setup using UIO

Message

Magnus Damm March 21, 2021, 11:38 a.m. UTC

sh73a0 CMT test setup using UIO

[PATCH 1/2] sh73a0 CMT1 device exposed via UIO
[PATCH 2/2] UIO CMT test program

These two patches contain kernel and user space modificatons to allow some
basic testing from user space of the CMT1 device included on the sh73a0 SoC.

Similar code for other target platforms have been posted earlier as:
[PATCH 0/2] r8a77961 CMT test setup using UIO
[PATCH] r8a77965 CMT test setup using UIO

This time the SoC-specific part has been adjusted to fit sh73a0 and the
user space test program has been extended to wait for and ack multiple IRQs.

For the kernel, simply apply the kernel patch (including a few debug printouts)
and make sure to extend your kernel config with CONFIG_UIO_PDRV_GENIRQ=y.

The following log shows how to execute the test program on the target:

# ./uio-cmt-test
found matching UIO device at /sys/class/uio/uio0/
[   39.717894] irqcontrol 1
[   41.718729] irqhandler 33
IRQ nr 0
[   41.721397] irqcontrol 1
[   43.718968] irqhandler 33
IRQ nr 1
[   43.721614] irqcontrol 1
[   45.719211] irqhandler 33
IRQ nr 2
[   45.721854] irqcontrol 1
/ #

Test program output and /proc/interrupts (with or without kernel debug output)
may be used to verify that several interrupts have been delivered:

/ # cat /proc/interrupts
           CPU0       CPU1
24:          0          0     GIC-0  27 Edge      gt
25:       2629        168     GIC-0  29 Edge      twd
31:          0          0     GIC-0  87 Level     arm-pmu
32:          0          0     GIC-0  88 Level     arm-pmu
33:          3          0     GIC-0  97 Level     timer

The code applies on v5.10. Not for upstream merge.

Not-Yet-Signed-off-by: Magnus Damm <[e-mail]>
---
 arch/arm/boot/dts/sh73a0.dtsi |    2
 drivers/uio/uio.c             |    3
 drivers/uio/uio_pdrv_genirq.c |   10 +-
 uio-cmt-test-20210321.c       |  179 +++++++++++++++++++++++++++++++++++++++++
 4 files changed, 190 insertions(+), 4 deletions(-)