From patchwork Thu Oct 4 20:41:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Niklas_S=C3=B6derlund?= X-Patchwork-Id: 10626685 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0989515E8 for ; Thu, 4 Oct 2018 20:42:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F098C29725 for ; Thu, 4 Oct 2018 20:42:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E3FCF29733; Thu, 4 Oct 2018 20:42:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D806A29725 for ; Thu, 4 Oct 2018 20:42:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727878AbeJEDh3 (ORCPT ); Thu, 4 Oct 2018 23:37:29 -0400 Received: from bin-mail-out-05.binero.net ([195.74.38.228]:33108 "EHLO bin-mail-out-05.binero.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727519AbeJEDh3 (ORCPT ); Thu, 4 Oct 2018 23:37:29 -0400 X-Halon-ID: fdba7c4d-c815-11e8-8edf-005056917f90 Authorized-sender: niklas@soderlund.pp.se Received: from bismarck.berto.se (unknown [89.233.230.99]) by bin-vsp-out-02.atm.binero.net (Halon) with ESMTPA id fdba7c4d-c815-11e8-8edf-005056917f90; Thu, 04 Oct 2018 22:42:28 +0200 (CEST) From: =?utf-8?q?Niklas_S=C3=B6derlund?= To: Kieran Bingham , Laurent Pinchart , Jacopo Mondi , linux-media@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, =?utf-8?q?Niklas_S=C3=B6derlund?= Subject: [PATCH v2 0/5] i2c: adv748x: add support for CSI-2 TXA to work in 1-, 2- and 4-lane mode Date: Thu, 4 Oct 2018 22:41:33 +0200 Message-Id: <20181004204138.2784-1-niklas.soderlund@ragnatech.se> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Niklas Söderlund Hi, This series allows the TXA CSI-2 transmitter of the adv748x to function in 1-, 2- and 4- lane mode. Currently the driver fixes the hardware in 4-lane mode. The driver looks at the standard DT property 'data-lanes' to determine which mode it should operate in. Patch 1/5 lists the 'data-lanes' DT property as mandatory for endpoints describing the CSI-2 transmitters. Patch 2/5 and 3/5 refactors the initialization sequence of the adv748x to be able to reuse more code. Patch 4/5 adds the DT parsing and storing of the number of lanes. Patch 5/5 merges the TXA and TXB power up/down procedure while also taking the configurable number of lanes into account. The series is based on the latest media-tree master and is tested on Renesas M3-N in 1-, 2- and 4- lane mode. Niklas Söderlund (5): dt-bindings: adv748x: make data-lanes property mandatory for CSI-2 endpoints i2c: adv748x: reorder register writes for CSI-2 transmitters initialization i2c: adv748x: reuse power up sequence when initializing CSI-2 i2c: adv748x: store number of CSI-2 lanes described in device tree i2c: adv748x: configure number of lanes used for TXA CSI-2 transmitter .../devicetree/bindings/media/i2c/adv748x.txt | 3 + drivers/media/i2c/adv748x/adv748x-core.c | 207 ++++++++++-------- drivers/media/i2c/adv748x/adv748x.h | 1 + 3 files changed, 122 insertions(+), 89 deletions(-)