mbox series

[0/5] clk: renesas: Add MFIS clock

Message ID 20201210142021.163182-1-julien.massot@iot.bzh (mailing list archive)
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Series clk: renesas: Add MFIS clock | expand

Message

Julien Massot Dec. 10, 2020, 2:20 p.m. UTC
This series adds the missing MFIS clocks for most Reneas R-Car Gen3
SoCs. I have tested this series on E3, M3, and H3 based boards,
I don't have access to D3 nor V3 boards.

Julien Massot (5):
  clk: renesas: r8a7795: Add MFIS clock
  clk: renesas: r8a7796: Add MFIS clock
  clk: renesas: r8a77965: Add MFIS clock
  clk: renesas: r8a77990: Add MFIS clock
  clk: renesas: r8a77995: Add MFIS clock

 drivers/clk/renesas/r8a7795-cpg-mssr.c  | 1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c  | 1 +
 drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
 5 files changed, 5 insertions(+)

Comments

Biju Das Dec. 10, 2020, 2:57 p.m. UTC | #1
Hi Julian,

Thanks for the patch.

> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> 
> This series adds the missing MFIS clocks for most Reneas R-Car Gen3 SoCs.
> I have tested this series on E3, M3, and H3 based boards, I don't have
> access to D3 nor V3 boards.

Just a question, Can you explain what test have you done with MFIS module?

Cheers,
Biju

> 
> Julien Massot (5):
>   clk: renesas: r8a7795: Add MFIS clock
>   clk: renesas: r8a7796: Add MFIS clock
>   clk: renesas: r8a77965: Add MFIS clock
>   clk: renesas: r8a77990: Add MFIS clock
>   clk: renesas: r8a77995: Add MFIS clock
> 
>  drivers/clk/renesas/r8a7795-cpg-mssr.c  | 1 +
> drivers/clk/renesas/r8a7796-cpg-mssr.c  | 1 +
> drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
> drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 +
> drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
>  5 files changed, 5 insertions(+)
> 
> --
> 2.29.2
Julien Massot Dec. 10, 2020, 3:03 p.m. UTC | #2
Hi,

On 12/10/20 3:57 PM, Biju Das wrote:
> Hi Julian,
> 
> Thanks for the patch.
> 
>> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
>>
>> This series adds the missing MFIS clocks for most Reneas R-Car Gen3 SoCs.
>> I have tested this series on E3, M3, and H3 based boards, I don't have
>> access to D3 nor V3 boards.
> 
> Just a question, Can you explain what test have you done with MFIS module?
A basic usage I did is to store and read a byte into one of the 
communication register MFISARIICR / MFISAREMBR, a more complex usage is 
to trigger interrupts between Linux and the realtime processor, using a 
mailbox driver, that I didn't post yet.

Regards,
Biju Das Dec. 10, 2020, 3:44 p.m. UTC | #3
Hi Julian,

> Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
> 
> Hi,
> 
> On 12/10/20 3:57 PM, Biju Das wrote:
> > Hi Julian,
> >
> > Thanks for the patch.
> >
> >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> >>
> >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3
> SoCs.
> >> I have tested this series on E3, M3, and H3 based boards, I don't
> >> have access to D3 nor V3 boards.
> >
> > Just a question, Can you explain what test have you done with MFIS
> module?
> A basic usage I did is to store and read a byte into one of the
> communication register MFISARIICR / MFISAREMBR, a more complex usage is to
> trigger interrupts between Linux and the realtime processor, using a
> mailbox driver, that I didn't post yet.

Thanks for the explanation.

FYI, As per R-Car Gen3 HW manual RCar-D3 doesn't have RT Core.

Regards,
Biju
Geert Uytterhoeven Dec. 11, 2020, 12:48 p.m. UTC | #4
Hi Biju,

On Thu, Dec 10, 2020 at 4:47 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
> > On 12/10/20 3:57 PM, Biju Das wrote:
> > >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> > >>
> > >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3
> > SoCs.
> > >> I have tested this series on E3, M3, and H3 based boards, I don't
> > >> have access to D3 nor V3 boards.
> > >
> > > Just a question, Can you explain what test have you done with MFIS
> > module?
> > A basic usage I did is to store and read a byte into one of the
> > communication register MFISARIICR / MFISAREMBR, a more complex usage is to
> > trigger interrupts between Linux and the realtime processor, using a
> > mailbox driver, that I didn't post yet.
>
> Thanks for the explanation.
>
> FYI, As per R-Car Gen3 HW manual RCar-D3 doesn't have RT Core.

But R-Car D3 still has (a subset of) the MFIS.

Gr{oetje,eeting}s,

                        Geert
Geert Uytterhoeven Dec. 11, 2020, 12:52 p.m. UTC | #5
Hi Julien,

On Thu, Dec 10, 2020 at 4:17 PM Julien Massot <julien.massot@iot.bzh> wrote:
> On 12/10/20 3:57 PM, Biju Das wrote:
> >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> >>
> >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3 SoCs.
> >> I have tested this series on E3, M3, and H3 based boards, I don't have
> >> access to D3 nor V3 boards.
> >
> > Just a question, Can you explain what test have you done with MFIS module?
> A basic usage I did is to store and read a byte into one of the
> communication register MFISARIICR / MFISAREMBR, a more complex usage is
> to trigger interrupts between Linux and the realtime processor, using a
> mailbox driver, that I didn't post yet.

Thanks for your series!

Is it OK if I postpone applying this (possibly squashed into a single commit)
until you have posted an MFIS driver?
Thanks, and have a nice weekend!

Gr{oetje,eeting}s,

                        Geert
Julien Massot Dec. 11, 2020, 1:06 p.m. UTC | #6
> Is it OK if I postpone applying this (possibly squashed into a single commit)
> until you have posted an MFIS driver?
Yes it does make sense, the mailbox driver could take longer
to be reviewed. I was more looking at how to break dependencies if
the mailbox driver will go into a different tree.


Thanks for your time,
Have a nice weekend too !

Julien
Biju Das Dec. 11, 2020, 3:49 p.m. UTC | #7
Hi Geert,

> Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
> 
> Hi Biju,
> 
> On Thu, Dec 10, 2020 at 4:47 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > > Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock On 12/10/20
> > > 3:57 PM, Biju Das wrote:
> > > >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> > > >>
> > > >> This series adds the missing MFIS clocks for most Reneas R-Car
> > > >> Gen3
> > > SoCs.
> > > >> I have tested this series on E3, M3, and H3 based boards, I don't
> > > >> have access to D3 nor V3 boards.
> > > >
> > > > Just a question, Can you explain what test have you done with MFIS
> > > module?
> > > A basic usage I did is to store and read a byte into one of the
> > > communication register MFISARIICR / MFISAREMBR, a more complex usage
> > > is to trigger interrupts between Linux and the realtime processor,
> > > using a mailbox driver, that I didn't post yet.
> >
> > Thanks for the explanation.
> >
> > FYI, As per R-Car Gen3 HW manual RCar-D3 doesn't have RT Core.
> 
> But R-Car D3 still has (a subset of) the MFIS.

Yes, True. But currently I don't know it's usage on D3.

Thanks and regards,
Biju