Message ID | 20220830164518.1381632-1-biju.das.jz@bp.renesas.com (mailing list archive) |
---|---|
Headers | show |
Series | Add RZ/N1 CAN support | expand |
On 30.08.2022 17:45:15, Biju Das wrote: > This patch series supports CAN{0,1} populated on RZ/N1D-DB board. > > v2->v3: > * Documented power-domains support. > * Dropped clock-names property from CAN nodes. > * Added power-domains property to the CAN nodes. > v1->v2: > * Added RZ/N1 specific compatible string. > * Added clock-names property. > > This patch series depend upon [1] > [1] https://lore.kernel.org/linux-renesas-soc/20220819084532.ywtziogd7ycuozxx@pengutronix.de/ > > Biju Das (3): > dt-bindings: can: nxp,sja1000: Document RZ/N1 power-domains support > ARM: dts: r9a06g032: Add CAN{0,1} nodes > ARM: dts: r9a06g032-rzn1d400-db: Enable CAN{0,1} Who will take this series (once it's ready)? regards, Marc
Hi Marc, > Subject: Re: [PATCH v3 0/3] Add RZ/N1 CAN support > > On 30.08.2022 17:45:15, Biju Das wrote: > > This patch series supports CAN{0,1} populated on RZ/N1D-DB board. > > > > v2->v3: > > * Documented power-domains support. > > * Dropped clock-names property from CAN nodes. > > * Added power-domains property to the CAN nodes. > > v1->v2: > > * Added RZ/N1 specific compatible string. > > * Added clock-names property. > > > > This patch series depend upon [1] > > [1] https://lore.kernel.org/linux-renesas- > soc/20220819084532.ywtziogd7ycuozxx@pengutronix.de/ > > > > Biju Das (3): > > dt-bindings: can: nxp,sja1000: Document RZ/N1 power-domains support > > ARM: dts: r9a06g032: Add CAN{0,1} nodes > > ARM: dts: r9a06g032-rzn1d400-db: Enable CAN{0,1} > > Who will take this series (once it's ready)? I guess, normally bindings by respective maintainer(ie, by you) and Renesas SoC/board dtsi/dts by Geert. Already SoC dtsi is queued for 6.1[1]. So I guess binding can be applied to respective subsystem tree. [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220830164518.1381632-3-biju.das.jz@bp.renesas.com/ Cheers, Biju
On 05.09.2022 16:13:09, Biju Das wrote: > Hi Marc, > > > Subject: Re: [PATCH v3 0/3] Add RZ/N1 CAN support > > > > On 30.08.2022 17:45:15, Biju Das wrote: > > > This patch series supports CAN{0,1} populated on RZ/N1D-DB board. > > > > > > v2->v3: > > > * Documented power-domains support. > > > * Dropped clock-names property from CAN nodes. > > > * Added power-domains property to the CAN nodes. > > > v1->v2: > > > * Added RZ/N1 specific compatible string. > > > * Added clock-names property. > > > > > > This patch series depend upon [1] > > > [1] https://lore.kernel.org/linux-renesas- > > soc/20220819084532.ywtziogd7ycuozxx@pengutronix.de/ > > > > > > Biju Das (3): > > > dt-bindings: can: nxp,sja1000: Document RZ/N1 power-domains support > > > ARM: dts: r9a06g032: Add CAN{0,1} nodes > > > ARM: dts: r9a06g032-rzn1d400-db: Enable CAN{0,1} > > > > Who will take this series (once it's ready)? > > I guess, normally bindings by respective maintainer(ie, by you) and > Renesas SoC/board dtsi/dts by Geert. Already SoC dtsi is > queued for 6.1[1]. So I guess binding can be applied to respective subsystem > tree. > > [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220830164518.1381632-3-biju.das.jz@bp.renesas.com/ Ok, applied 1/3 to linux-can-next. regards, Marc