From patchwork Fri Jan 6 12:58:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 13091351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6468C6379F for ; Fri, 6 Jan 2023 12:59:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234211AbjAFM6n (ORCPT ); Fri, 6 Jan 2023 07:58:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234506AbjAFM62 (ORCPT ); Fri, 6 Jan 2023 07:58:28 -0500 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 820C86B59C; Fri, 6 Jan 2023 04:58:26 -0800 (PST) X-IronPort-AV: E=Sophos;i="5.96,305,1665414000"; d="scan'208";a="145413761" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 06 Jan 2023 21:58:25 +0900 Received: from mulinux.example.org (unknown [10.226.92.206]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 7A49B4254DA6; Fri, 6 Jan 2023 21:58:20 +0900 (JST) From: Fabrizio Castro To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Sebastian Reichel , Geert Uytterhoeven Cc: Fabrizio Castro , Lee Jones , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Chris Paterson , Biju Das , linux-renesas-soc@vger.kernel.org, Laurent Pinchart , Jacopo Mondi Subject: [PATCH v5 0/2] Driver support for RZ/V2M PWC Date: Fri, 6 Jan 2023 12:58:14 +0000 Message-Id: <20230106125816.10600-1-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The PWC IP found in the RZ/V2M family of chips comes with the below capabilities: * external power supply on/off sequence generation * on/off signal generation for the LPDDR4 core power supply (LPVDD) * key input signals processing * general-purpose output pins Version 5 of this series fixes subject line and changelog of the dt-bindings patch. Thanks, Fab Fabrizio Castro (2): dt-bindings: soc: renesas: Add RZ/V2M PWC soc: renesas: Add PWC support for RZ/V2M .../soc/renesas/renesas,rzv2m-pwc.yaml | 56 +++++++ drivers/soc/renesas/Kconfig | 4 + drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/pwc-rzv2m.c | 141 ++++++++++++++++++ 4 files changed, 202 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml create mode 100644 drivers/soc/renesas/pwc-rzv2m.c