From patchwork Thu Feb 9 13:26:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13134539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 687CDC61DA4 for ; Thu, 9 Feb 2023 13:26:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229990AbjBIN0u (ORCPT ); Thu, 9 Feb 2023 08:26:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230168AbjBIN0s (ORCPT ); Thu, 9 Feb 2023 08:26:48 -0500 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E4D6755E49; Thu, 9 Feb 2023 05:26:40 -0800 (PST) X-IronPort-AV: E=Sophos;i="5.97,283,1669042800"; d="scan'208";a="149040862" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 09 Feb 2023 22:26:40 +0900 Received: from localhost.localdomain (unknown [10.226.92.132]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 047C54334957; Thu, 9 Feb 2023 22:26:35 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman Cc: Biju Das , Jiri Slaby , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , "Maciej W. Rozycki" , Eric Tremblay , Wander Lairson Costa , linux-serial@vger.kernel.org, Geert Uytterhoeven , Fabrizio Castro , linux-renesas-soc@vger.kernel.org Subject: [PATCH 0/3] Add Identification and 64 bit fifo support to Renesas RZ/V2M 16750 UART Date: Thu, 9 Feb 2023 13:26:27 +0000 Message-Id: <20230209132630.194947-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add identification and 64 bit fifo support to Renesas RZ/V2M 16750 UART. This patch series also simplifies 8250_em_probe() and also updates the RZ/V2M specific register handling for the below restriction mentioned in hardware manual 40.6.1 Point for Caution when Changing the Register Settings: When changing the settings of the following registers, a PRESETn master reset or FIFO reset + SW reset (FCR[2],FCR[1], HCR0[7]) must be input to re-initialize them. Target Registers: FCR, LCR, MCR, DLL, DLM, HCR0. Biju Das (3): serial: 8250: Identify Renesas RZ/V2M 16750 UART serial: 8250_em: Use dev_err_probe() serial: 8250_em: Add serial8250_rzv2m_reg_update() drivers/tty/serial/8250/8250_em.c | 70 +++++++++++++++++++++++------ drivers/tty/serial/8250/8250_port.c | 27 +++++++++++ 2 files changed, 84 insertions(+), 13 deletions(-)