From patchwork Mon Oct 9 09:37:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13413237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB320E95A91 for ; Mon, 9 Oct 2023 09:39:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345972AbjJIJjw (ORCPT ); Mon, 9 Oct 2023 05:39:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345978AbjJIJju (ORCPT ); Mon, 9 Oct 2023 05:39:50 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDDDEA2; Mon, 9 Oct 2023 02:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1696844384; x=1728380384; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=ZRuE2tSMRuMJGGwfwdNw7XZT5KskCOTB/yFjYNEOofk=; b=1+ZHjXBdCcQskbYR7U5zn3sbfyzY5o7SGXRI3iQTBiJHo6V8HXF6/M5g sVlD57zHsHNcgPLY9/FAhrDEahj4QKObT87mnSo0QEaQ0nV/DLhLGumfV gFMJuHlzZo32uwFzDNZi+lvCWvTrzX+0AnQCxhZjaEkqjKX0W8qVjPWzz AEwBgJq9wNjFUwzRPDrN6Szl4HcOBgN334fzpU09u08yf3mAz8sYkEnKm Vyeab4D1yFbBzhxs0s7HJclK6uEXWDyNPi3Uw97HuYAk48Ot5uQ5/LDvR 8oVwkIgQozKv5otFod6Fs14IU+AY6XQH97ZNj2UMnyLakI3CLxpkAuzUZ w==; X-CSE-ConnectionGUID: K9WVynclRKmZ6/s6ZtJcJQ== X-CSE-MsgGUID: XkssOkC9QNO6ufR14eLWEg== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,210,1694761200"; d="scan'208";a="9639644" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 09 Oct 2023 02:39:43 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 9 Oct 2023 02:39:43 -0700 Received: from wendy.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Mon, 9 Oct 2023 02:39:38 -0700 From: Conor Dooley To: CC: , , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Paul Walmsley" , Palmer Dabbelt , Albert Ou , Chen-Yu Tsai , "Jernej Skrabec" , Samuel Holland , Daire McNamara , Geert Uytterhoeven , Magnus Damm , "Emil Renner Berthing" , Jisheng Zhang , Guo Ren , Fu Wei , Chen Wang , , , , Subject: [PATCH v3 0/6] riscv,isa-extensions additions Date: Mon, 9 Oct 2023 10:37:44 +0100 Message-ID: <20231009-approve-verbalize-ce9324858e76@wendy> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2459; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=ZRuE2tSMRuMJGGwfwdNw7XZT5KskCOTB/yFjYNEOofk=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKnKJ1+YKRm3TZbcu+zn6U3vXaa0zL/3fPKtO/kZT/7M1L2u /Pjp245SFgYxDgZZMUWWxNt9LVLr/7jscO55CzOHlQlkCAMXpwBMZG4Cw1+5ROlyZoWrsxIPLw9g7k 8IWbBImnFj0vbZnLwVMnXvrdQY/mmsfVrxujRg2duifs4tPX9PnTogdpr/0ief7d9NJPI0MpgA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Now with the RFC tag dropped. There are no changes here from "RFC v2", other than the addition of tags that were provided along the way. I have not added "Zfh" to the T-Head based stuff, as I can't actually read the documentation that would show that they're encoding-for-encoding compatible with the standard extension, since it is apparently only in Chinese. The canaan stuff is absent here, mostly because I don't actually know what to do with it. They don't actually implement the same versions of the F stuff as everyone else (Stefan O'Rear pointed that out to me somewhere recently). Cheers, Conor. CC: Rob Herring CC: Krzysztof Kozlowski CC: Conor Dooley CC: Paul Walmsley CC: Palmer Dabbelt CC: Albert Ou CC: Chen-Yu Tsai CC: Jernej Skrabec CC: Samuel Holland CC: Daire McNamara CC: Geert Uytterhoeven CC: Magnus Damm CC: Emil Renner Berthing CC: Jisheng Zhang CC: Guo Ren CC: Fu Wei CC: Chen Wang CC: devicetree@vger.kernel.org CC: linux-riscv@lists.infradead.org CC: linux-sunxi@lists.linux.dev CC: linux-renesas-soc@vger.kernel.org Conor Dooley (6): riscv: dts: microchip: convert isa detection to new properties riscv: dts: sifive: convert isa detection to new properties riscv: dts: starfive: convert isa detection to new properties riscv: dts: renesas: convert isa detection to new properties riscv: dts: allwinner: convert isa detection to new properties riscv: dts: thead: convert isa detection to new properties arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 3 +++ arch/riscv/boot/dts/microchip/mpfs.dtsi | 15 +++++++++++++++ arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 3 +++ arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 15 +++++++++++++++ arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 15 +++++++++++++++ arch/riscv/boot/dts/starfive/jh7100.dtsi | 6 ++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 15 +++++++++++++++ arch/riscv/boot/dts/thead/th1520.dtsi | 12 ++++++++++++ 8 files changed, 84 insertions(+)