Message ID | 20240202093907.9465-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
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AJvYcCUUDg5EKFQ6lKeH9tifuLilUYhCj+nfQEiF++RwxrqZX1gmgZ3PdfwsfFlXLyW/qT66RfC1faoHZr5iti+ILaEnAdwZqkcBRuwcAQulhGelTDo8gDkcAiKNLLBzxtIvR7O0yvQmg8YMGQIBE7LHkYOMX/Kp5HgfZSlvm/8760AC2vo67DHZHfwL/wOIA/6cjyxnkirnXb9cQlQinMzIvS+S52+Z1j0oMGDyCpS4zHNni1qDziqtv1oicd5FoleHyTHoV39sG2E/waRq4k2PohF69lYzR0/wfNlSNg5L0FUFuKiRxeTahzx1QckDULcSRwxBBVdfftPZTlbEt3h++AwsaSqIzQPjYHsg/zKvQgaZjMkOt69K2BF/GhFxnt5Zl0KQVyIV/zgDMtHdrptrwzEfR2A8maw69+EKGxGiY42hTyYsuRZ4oL8tqXLLKXg/bAJ8WXNeswlezOJBvJ+0EqV1JAKWCtyBsK+IoiA6k+M= Received: from prasmi.home ([2a00:23c8:2500:a01:a994:230a:9969:dbf7]) by smtp.gmail.com with ESMTPSA id bg10-20020a05600c3c8a00b0040fbdf77ca3sm3827530wmb.42.2024.02.02.01.39.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Feb 2024 01:39:21 -0800 (PST) From: Prabhakar <prabhakar.csengg@gmail.com> X-Google-Original-From: Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> To: Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com> Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH 0/3] Renesas RZ/G2L family and RZ/G3S add missing IRQC interrupts Date: Fri, 2 Feb 2024 09:39:04 +0000 Message-Id: <20240202093907.9465-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: <linux-renesas-soc.vger.kernel.org> List-Subscribe: <mailto:linux-renesas-soc+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-renesas-soc+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit |
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Renesas RZ/G2L family and RZ/G3S add missing IRQC interrupts
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Hi All, This patch series aims to add the missing bus-error and eccram error interrupts for RZ/G2L family and RZ/G3S SoC. Cheers, Prabhakar Lad Prabhakar (3): dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Update interrupts arm64: dts: renesas: rz-g2l-family: Add missing interrupts from IRQC IP block arm64: dts: renesas: r9a08g045: Add missing interrupts of IRQC node .../renesas,rzg2l-irqc.yaml | 44 +++++++++++++++---- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 12 ++++- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 22 +++++++++- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 22 +++++++++- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 8 +++- 5 files changed, 93 insertions(+), 15 deletions(-)