Message ID | 20241106120118.1719888-1-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cee6afe528sm2697984a12.55.2024.11.06.04.01.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2024 04:01:27 -0800 (PST) From: Claudiu <claudiu.beznea@tuxon.dev> X-Google-Original-From: Claudiu <claudiu.beznea.uj@bp.renesas.com> To: geert+renesas@glider.be, magnus.damm@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, p.zabel@pengutronix.de, lethal@linux-sh.org, g.liakhovetski@gmx.de, ysato@users.sourceforge.jp, ulrich.hecht+renesas@gmail.com Cc: claudiu.beznea@tuxon.dev, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Subject: [PATCH 0/9] Add support for the rest of Renesas RZ/G3S serial interfaces Date: Wed, 6 Nov 2024 14:01:09 +0200 Message-Id: <20241106120118.1719888-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: <linux-renesas-soc.vger.kernel.org> List-Subscribe: <mailto:linux-renesas-soc+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-renesas-soc+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit |
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Add support for the rest of Renesas RZ/G3S serial interfaces
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From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Hi, The Renesas RZ/G3S SoC has 6 serial interfaces. One of them is used as debug console (and it is already enabled in the current code base). Series adds support for the remaining ones. Patches: - 01/09 - adds clock, reset and power domain support for the serial interfaces - 02-03/09 - serial driver fixes patches identified while adding RZ/G3S support - 04/09 - extends suspend to RAM support on the serial driver for the RZ/G3S SoC - 05-09/09 - add device tree support Merge strategy, if any: - patch 01/09 can go through Renesas tree - patches 02-04/09 can go through serial tree - patches 05-09/09 can go through Renesas tree Thank you, Claudiu Beznea Claudiu Beznea (9): clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs serial: sh-sci: Check if TX data was written to device in .tx_empty() serial: sh-sci: Clean sci_ports[0] after at earlycon exit serial: sh-sci: Update the suspend/resume support arm64: dts: renesas: r9a08g045: Add the remaining SCIF interfaces arm64: dts: renesas: rzg3s-smarc: Fix the debug serial alias arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches arm64: dts: renesas: rzg3s-smarc: Enable SCIF3 arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1 arch/arm64/boot/dts/renesas/Makefile | 3 + arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 90 ++++++++++++++++++ .../dts/renesas/r9a08g045s33-smarc-pmod.dtso | 48 ++++++++++ .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 25 +---- .../boot/dts/renesas/rzg3s-smarc-switches.h | 32 +++++++ arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 25 ++++- drivers/clk/renesas/r9a08g045-cpg.c | 20 ++++ drivers/tty/serial/sh-sci.c | 92 +++++++++++++++++-- 8 files changed, 301 insertions(+), 34 deletions(-) create mode 100644 arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod.dtso create mode 100644 arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h