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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cf03c4f0bdsm1775959a12.56.2024.11.08.02.05.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 02:05:23 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, magnus.damm@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, p.zabel@pengutronix.de, g.liakhovetski@gmx.de, lethal@linux-sh.org Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v2 0/8] Add support for the rest of Renesas RZ/G3S serial interfaces Date: Fri, 8 Nov 2024 12:05:05 +0200 Message-Id: <20241108100513.2814957-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Hi, The Renesas RZ/G3S SoC has 6 serial interfaces. One of them is used as debug console (and it is already enabled in the current code base). Series adds support for the remaining ones. Patches: - 01/08 - adds clock, reset and power domain support for the serial interfaces - 02/08 - serial driver fix patch identified while adding RZ/G3S support - 03/08 - extends suspend to RAM support on the serial driver for the RZ/G3S SoC - 04-08/08 - add device tree support Merge strategy, if any: - patch 01/08 can go through Renesas tree - patches 02-03/08 can go through serial tree - patches 04-08/08 can go through Renesas tree Thank you, Claudiu Beznea Changes in v2: - drop patch "serial: sh-sci: Clean sci_ports[0] after at earlycon exit" from v1 as it was already applied - used bool instead of atomic_t in patch "serial: sh-sci: Check if TX data was written to device in .tx_empty()" Claudiu Beznea (8): clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs serial: sh-sci: Check if TX data was written to device in .tx_empty() serial: sh-sci: Update the suspend/resume support arm64: dts: renesas: r9a08g045: Add the remaining SCIF interfaces arm64: dts: renesas: rzg3s-smarc: Fix the debug serial alias arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches arm64: dts: renesas: rzg3s-smarc: Enable SCIF3 arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1 arch/arm64/boot/dts/renesas/Makefile | 3 + arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 90 +++++++++++++++++++ .../dts/renesas/r9a08g045s33-smarc-pmod.dtso | 48 ++++++++++ .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 25 +----- .../boot/dts/renesas/rzg3s-smarc-switches.h | 32 +++++++ arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 25 +++++- drivers/clk/renesas/r9a08g045-cpg.c | 20 +++++ drivers/tty/serial/sh-sci.c | 64 +++++++++++-- 8 files changed, 273 insertions(+), 34 deletions(-) create mode 100644 arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod.dtso create mode 100644 arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h