| Message ID | 20250206134047.67866-1-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add RZ/G3E SDHI support | expand |
Hi Ulf, Wolfram, > -----Original Message----- > From: Biju Das <biju.das.jz@bp.renesas.com> > Sent: 06 February 2025 13:40 > Subject: [PATCH v3 0/8] Add RZ/G3E SDHI support > > The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that of the RZ/V2H, but the SD0 channel > has only dedicated pins, so we must use SD_STATUS register to control voltage and power enable > (internal regulator). > > For SD1 and SD2 channel we can either use gpio regulator or internal regulator (using SD_STATUS > register) for voltage switching. > > For SD0, fixed voltage(eMMC) uses fixed regulator and non-fixed voltage > (SD) uses internal regulator. > > v2->v3: > * Collected tags > * Renamed internal regulator labels vqmmc_sdhi{0..2}->sdhi{0..2}_vqmmc. > * Updated regulator phandles on SoM/Board dts. > * Dropped renaming the gpio regulator label vqmmc_sdhi1->vqmmc_sdhi1_gpio. > * Renamed node sd0emmc->sd0-emmc > * Renamed sd0-emmc-{ctrl,data,rst}->sd0-{ctrl,data,rst} > * Moved header file gpio.h from patch#6 to patch#8. > * Dropped overriding internal regulator name. > * Dropped #if guard in pinctrl node for SDHI0 > * Renamed the label/node sdhi0_pins: sd0->sdhi0_usd_pins: sd0-usd. > v1->v2: > * Collected tags. > * Documented internal regulator as optional property for both RZ/G3E and > RZ/V2H SoCs. > * Updated commit description for regulator used in SD0 fixed and > non-fixed voltage case in patch#3. > * As the node enabling of internal regulator is controlled through status, > added a check for device availability. > * Status of internal regulator is disabled in the SoC .dtsi. Override > the status in the board DTS when needed. > * Added support for enabling SDHI internal regulator in RZ/V2H > * Added missing header file gpio.h > * Used fixed regulator for eMMC on SD0 and dropped sd0-iovs pins for > eMMC. > * Sorted pinctrl nodes for sd2 > * Enabled internal regulator for SD2. > * Added support for enabling SD on SDHI0 > * Replaced the regulator usd_vdd_3p3v->reg_3p3v. > * Renamed the gpio-hog node sd1-pwr-en->sd1-pwr-en-hog. > * Sorted sd1 pin ctrl nodes. > > Biju Das (8): > dt-bindings: mmc: renesas,sdhi: Document RZ/G3E support > mmc: renesas_sdhi: Arrange local variables in reverse xmas tree order > mmc: renesas_sdhi: Add support for RZ/G3E SoC > arm64: dts: renesas: r9a09g047: Add SDHI0-SDHI2 nodes > arm64: dts: renesas: r9a09g057: Add support for enabling SDHI internal > regulator > arm64: dts: renesas: rzg3e-smarc-som: Enable SDHI{0,2} > arm64: dts: renesas: rzg3e-smarc-som: Add support for enable SD on > SDHI0 > arm64: dts: renesas: r9a09g047e57-smarc: Enable SDHI1 > > .../devicetree/bindings/mmc/renesas,sdhi.yaml | 16 ++ > arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 60 +++++++ > .../boot/dts/renesas/r9a09g047e57-smarc.dts | 49 ++++++ > arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 21 +++ > .../boot/dts/renesas/renesas-smarc2.dtsi | 18 ++ > .../boot/dts/renesas/rzg3e-smarc-som.dtsi | 154 ++++++++++++++++++ > drivers/mmc/host/renesas_sdhi.h | 1 + > drivers/mmc/host/renesas_sdhi_core.c | 136 +++++++++++++++- > drivers/mmc/host/tmio_mmc.h | 5 + > 9 files changed, 459 insertions(+), 1 deletion(-) Gentle ping. Cheers, Biju
The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that of the RZ/V2H, but the SD0 channel has only dedicated pins, so we must use SD_STATUS register to control voltage and power enable (internal regulator). For SD1 and SD2 channel we can either use gpio regulator or internal regulator (using SD_STATUS register) for voltage switching. For SD0, fixed voltage(eMMC) uses fixed regulator and non-fixed voltage (SD) uses internal regulator. v2->v3: * Collected tags * Renamed internal regulator labels vqmmc_sdhi{0..2}->sdhi{0..2}_vqmmc. * Updated regulator phandles on SoM/Board dts. * Dropped renaming the gpio regulator label vqmmc_sdhi1->vqmmc_sdhi1_gpio. * Renamed node sd0emmc->sd0-emmc * Renamed sd0-emmc-{ctrl,data,rst}->sd0-{ctrl,data,rst} * Moved header file gpio.h from patch#6 to patch#8. * Dropped overriding internal regulator name. * Dropped #if guard in pinctrl node for SDHI0 * Renamed the label/node sdhi0_pins: sd0->sdhi0_usd_pins: sd0-usd. v1->v2: * Collected tags. * Documented internal regulator as optional property for both RZ/G3E and RZ/V2H SoCs. * Updated commit description for regulator used in SD0 fixed and non-fixed voltage case in patch#3. * As the node enabling of internal regulator is controlled through status, added a check for device availability. * Status of internal regulator is disabled in the SoC .dtsi. Override the status in the board DTS when needed. * Added support for enabling SDHI internal regulator in RZ/V2H * Added missing header file gpio.h * Used fixed regulator for eMMC on SD0 and dropped sd0-iovs pins for eMMC. * Sorted pinctrl nodes for sd2 * Enabled internal regulator for SD2. * Added support for enabling SD on SDHI0 * Replaced the regulator usd_vdd_3p3v->reg_3p3v. * Renamed the gpio-hog node sd1-pwr-en->sd1-pwr-en-hog. * Sorted sd1 pin ctrl nodes. Biju Das (8): dt-bindings: mmc: renesas,sdhi: Document RZ/G3E support mmc: renesas_sdhi: Arrange local variables in reverse xmas tree order mmc: renesas_sdhi: Add support for RZ/G3E SoC arm64: dts: renesas: r9a09g047: Add SDHI0-SDHI2 nodes arm64: dts: renesas: r9a09g057: Add support for enabling SDHI internal regulator arm64: dts: renesas: rzg3e-smarc-som: Enable SDHI{0,2} arm64: dts: renesas: rzg3e-smarc-som: Add support for enable SD on SDHI0 arm64: dts: renesas: r9a09g047e57-smarc: Enable SDHI1 .../devicetree/bindings/mmc/renesas,sdhi.yaml | 16 ++ arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 60 +++++++ .../boot/dts/renesas/r9a09g047e57-smarc.dts | 49 ++++++ arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 21 +++ .../boot/dts/renesas/renesas-smarc2.dtsi | 18 ++ .../boot/dts/renesas/rzg3e-smarc-som.dtsi | 154 ++++++++++++++++++ drivers/mmc/host/renesas_sdhi.h | 1 + drivers/mmc/host/renesas_sdhi_core.c | 136 +++++++++++++++- drivers/mmc/host/tmio_mmc.h | 5 + 9 files changed, 459 insertions(+), 1 deletion(-)