From patchwork Fri Oct 21 14:13:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13014872 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73A37C43217 for ; Fri, 21 Oct 2022 14:13:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231337AbiJUONN (ORCPT ); Fri, 21 Oct 2022 10:13:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231355AbiJUONL (ORCPT ); Fri, 21 Oct 2022 10:13:11 -0400 Received: from baptiste.telenet-ops.be (baptiste.telenet-ops.be [IPv6:2a02:1800:120:4::f00:13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF2DE27BB37 for ; Fri, 21 Oct 2022 07:13:10 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:8c7:6dd8:b0ce:eea6]) by baptiste.telenet-ops.be with bizsmtp id aeD82800N5BCT2h01eD8T9; Fri, 21 Oct 2022 16:13:08 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1olslo-000evB-78; Fri, 21 Oct 2022 16:13:08 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1olsln-001LDE-5o; Fri, 21 Oct 2022 16:13:07 +0200 From: Geert Uytterhoeven To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v3 0/2] arm64: dts: renesas: r8a779g0: Add remaining (H)SCIF nodes Date: Fri, 21 Oct 2022 16:13:03 +0200 Message-Id: X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Hi all, This patch series adds devices nodes for the remaining Serial and High Speed Serial Communication Interfaces with FIFO ((H)SCIF) on the Renesas R-Car V4H (R8A779G0) SoC. Changes compared to v2[1]: - Correct SCIF register block size. Changes compared to v1[2]: - Replace S0D3_PER by SASYNCPERD1, as per R-Car V4H Hardware User's Manual rev. 0.54. SCIF[134] and HSCIF[13] can be accessed on expansion connectors on the White Hawk BreatOut Board using DT overlays available from [3]. They have been tested with a logic analyzer (to verify clocking) and with external loopback. I plan to queues this series in renesas-devel for v6.2. Thanks for your comments! [1] https://lore.kernel.org/r/cover.1665156023.git.geert+renesas@glider.be [2] https://lore.kernel.org/r/cover.1665065132.git.geert+renesas@glider.be [3] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/renesas-overlays Geert Uytterhoeven (2): arm64: dts: renesas: r8a779g0: Add SCIF nodes arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodes arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 124 +++++++++++++++++++++- 1 file changed, 121 insertions(+), 3 deletions(-)