Show patches with: Series = Add SYS and GIC clock entries for RZ/V2H(P) SoC       |    State = Action Required       |   5 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[5/5] clk: renesas: r9a09g057: Add clock and reset entries for GIC Add SYS and GIC clock entries for RZ/V2H(P) SoC - - - --- 2024-12-18 Lad, Prabhakar geert New
[4/5] clk: renesas: r9a09g057: Add reset entry for SYS Add SYS and GIC clock entries for RZ/V2H(P) SoC - - - --- 2024-12-18 Lad, Prabhakar geert New
[3/5] clk: renesas: rzv2h: Simplify BUS_MSTOP macros and field extraction Add SYS and GIC clock entries for RZ/V2H(P) SoC - - - --- 2024-12-18 Lad, Prabhakar geert New
[2/5] clk: renesas: rzv2h: Relocate MSTOP-related macros to the family driver Add SYS and GIC clock entries for RZ/V2H(P) SoC - - - --- 2024-12-18 Lad, Prabhakar geert New
[1/5] clk: renesas: rzv2h: Fix use-after-free in MSTOP refcount handling Add SYS and GIC clock entries for RZ/V2H(P) SoC - - - --- 2024-12-18 Lad, Prabhakar geert New