| Message ID | 0657b04f706119c56462ea6437c518804e9d5330.1642599415.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: renesas: Add-R-Car S4-8 Pin control support | expand |
Hi Geert-san, > From: Geert Uytterhoeven, Sent: Wednesday, January 19, 2022 11:02 PM > > Add the module clock used by the Pin Function (PFC/GPIO) controller > on the Renesas R-Car S4-8 (R8A779F0) SoC. > > Extracted from a larger patch in the BSP by LUU HOAI. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Thank you for the patch! Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Best regards, Yoshihiro Shimoda
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index e48c5af7341454a7..16271b8c3ed8ea31 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -122,6 +122,7 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { DEF_MOD("sys-dmac0", 709, R8A779F0_CLK_S0D3_PER), DEF_MOD("sys-dmac1", 710, R8A779F0_CLK_S0D3_PER), DEF_MOD("wdt", 907, R8A779F0_CLK_R), + DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M), }; static const unsigned int r8a779f0_crit_mod_clks[] __initconst = {
Add the module clock used by the Pin Function (PFC/GPIO) controller on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/clk/renesas/r8a779f0-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)