From patchwork Fri Jan 29 09:47:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 8161411 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0D663BEEED for ; Fri, 29 Jan 2016 09:48:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 57DD620382 for ; Fri, 29 Jan 2016 09:47:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 98F9520384 for ; Fri, 29 Jan 2016 09:47:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752777AbcA2Jr4 (ORCPT ); Fri, 29 Jan 2016 04:47:56 -0500 Received: from laurent.telenet-ops.be ([195.130.137.89]:43344 "EHLO laurent.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752597AbcA2Jrq (ORCPT ); Fri, 29 Jan 2016 04:47:46 -0500 Received: from ayla.of.borg ([84.195.106.123]) by laurent.telenet-ops.be with bizsmtp id Blnk1s00X2fm56U01lnkYH; Fri, 29 Jan 2016 10:47:45 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1aP5ea-0001Cj-Po; Fri, 29 Jan 2016 10:47:44 +0100 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1aP5eb-0000da-G2; Fri, 29 Jan 2016 10:47:45 +0100 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Laurent Pinchart , Geert Uytterhoeven Subject: [PATCH v4 04/11] ARM: dts: r8a7740: Rename the serial port clock to fck Date: Fri, 29 Jan 2016 10:47:34 +0100 Message-Id: <1454060861-2375-5-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454060861-2375-1-git-send-email-geert+renesas@glider.be> References: <1454060861-2375-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Laurent Pinchart The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Acked-by: Simon Horman Signed-off-by: Geert Uytterhoeven --- v4: - Change one-line summary prefix to match current arm-soc practices, v3: - No changes, v2: - Add Acked-by. --- arch/arm/boot/dts/r8a7740.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 36bcb39cca03b8df..995fbda74b7a057e 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -214,7 +214,7 @@ reg = <0xe6c40000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -224,7 +224,7 @@ reg = <0xe6c50000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -234,7 +234,7 @@ reg = <0xe6c60000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -244,7 +244,7 @@ reg = <0xe6c70000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -254,7 +254,7 @@ reg = <0xe6c80000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -264,7 +264,7 @@ reg = <0xe6cb0000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -274,7 +274,7 @@ reg = <0xe6cc0000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -284,7 +284,7 @@ reg = <0xe6cd0000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -294,7 +294,7 @@ reg = <0xe6c30000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; };