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[v3,7/7] soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions

Message ID 1457551122-21838-8-git-send-email-geert+renesas@glider.be (mailing list archive)
State Changes Requested
Delegated to: Simon Horman
Headers show

Commit Message

Geert Uytterhoeven March 9, 2016, 7:18 p.m. UTC
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - New.
---
 include/dt-bindings/power/r8a7795-sysc.h | 42 ++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 include/dt-bindings/power/r8a7795-sysc.h

Comments

Laurent Pinchart March 10, 2016, 2:32 a.m. UTC | #1
Hi Geert,

Thank you for the patch.

On Wednesday 09 March 2016 20:18:42 Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v3:
>   - New.
> ---
>  include/dt-bindings/power/r8a7795-sysc.h | 42 +++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
>  create mode 100644 include/dt-bindings/power/r8a7795-sysc.h
> 
> diff --git a/include/dt-bindings/power/r8a7795-sysc.h
> b/include/dt-bindings/power/r8a7795-sysc.h new file mode 100644
> index 0000000000000000..ee2e26ba605ef9a3
> --- /dev/null
> +++ b/include/dt-bindings/power/r8a7795-sysc.h
> @@ -0,0 +1,42 @@
> +/*
> + * Copyright (C) 2016 Glider bvba
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; version 2 of the License.
> + */
> +#ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__
> +#define __DT_BINDINGS_POWER_R8A7795_SYSC_H__
> +
> +/*
> + * These power domain indices match the numbers of the interrupt bits
> + * representing the power areas in the various Interrupt Registers
> + * (e.g. SYSCISR, Interrupt Status Register)
> + */
> +
> +#define R8A7795_PD_CA57_CPU0		 0
> +#define R8A7795_PD_CA57_CPU1		 1
> +#define R8A7795_PD_CA57_CPU2		 2
> +#define R8A7795_PD_CA57_CPU3		 3
> +#define R8A7795_PD_CA53_CPU0		 5
> +#define R8A7795_PD_CA53_CPU1		 6
> +#define R8A7795_PD_CA53_CPU2		 7
> +#define R8A7795_PD_CA53_CPU3		 8
> +#define R8A7795_PD_A3VP			 9
> +#define R8A7795_PD_CA57_SCU		12
> +#define R8A7795_PD_CR7			13
> +#define R8A7795_PD_A3VC			14
> +#define R8A7795_PD_3DG_A		17
> +#define R8A7795_PD_3DG_B		18
> +#define R8A7795_PD_3DG_C		19
> +#define R8A7795_PD_3DG_D		20
> +#define R8A7795_PD_CA53_SCU		21
> +#define R8A7795_PD_3DG_E		22
> +#define R8A7795_PD_A3IR			24
> +#define R8A7795_PD_A2VC0		25
> +#define R8A7795_PD_A2VC1		26
> +
> +/* Always-on power area */
> +#define R8A7795_PD_ALWAYS_ON		32

Shouldn't we also define the always-on power domain for the other SoCs 
(patches 2/7 to 6/7 in this series) ? I know they're already covered by the 
cpg power domain, but going forward I believe that standardizing on the SYSC 
power domains would be beneficial. We of course have to keep backward 
compatibility in the implementation.

This isn't an issue for this patch, so

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> +#endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */
Geert Uytterhoeven March 10, 2016, 8:17 a.m. UTC | #2
Hi Laurent,

On Thu, Mar 10, 2016 at 3:32 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Wednesday 09 March 2016 20:18:42 Geert Uytterhoeven wrote:
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

>> --- /dev/null
>> +++ b/include/dt-bindings/power/r8a7795-sysc.h
>> @@ -0,0 +1,42 @@

>> +/* Always-on power area */
>> +#define R8A7795_PD_ALWAYS_ON         32
>
> Shouldn't we also define the always-on power domain for the other SoCs
> (patches 2/7 to 6/7 in this series) ? I know they're already covered by the
> cpg power domain, but going forward I believe that standardizing on the SYSC
> power domains would be beneficial. We of course have to keep backward
> compatibility in the implementation.

Yes, that's the plan. I didn't want to make that change now, as someone
may object against the always-on power domain. On r8a7795 it feels more
natural, as it also has I/O devices in SYSC power areas, unlike R-Car Gen2
and H1.

Note that it also complicates the rcar-sysc core driver: it has to choose
between the cpg_mssr_*() or cpg_mstp_*() callbacks, depending on SoC, and also
depending on DTS if we migrate the older SoCs to CPG/MSSR and want to
maintain backwards-compatibility.

Time to finish the "renesas,apmu" enable-method work, and celebrate one big
flag day for all the new DT evolutions?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Laurent Pinchart March 10, 2016, 8:54 a.m. UTC | #3
Hi Geert,

On Thursday 10 March 2016 09:17:40 Geert Uytterhoeven wrote:
> On Thu, Mar 10, 2016 at 3:32 AM, Laurent Pinchart wrote:
> > On Wednesday 09 March 2016 20:18:42 Geert Uytterhoeven wrote:
> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> 
> >> --- /dev/null
> >> +++ b/include/dt-bindings/power/r8a7795-sysc.h
> >> @@ -0,0 +1,42 @@
> >> 
> >> +/* Always-on power area */
> >> +#define R8A7795_PD_ALWAYS_ON         32
> > 
> > Shouldn't we also define the always-on power domain for the other SoCs
> > (patches 2/7 to 6/7 in this series) ? I know they're already covered by
> > the cpg power domain, but going forward I believe that standardizing on
> > the SYSC power domains would be beneficial. We of course have to keep
> > backward compatibility in the implementation.
> 
> Yes, that's the plan. I didn't want to make that change now, as someone
> may object against the always-on power domain. On r8a7795 it feels more
> natural, as it also has I/O devices in SYSC power areas, unlike R-Car Gen2
> and H1.

That's fine with me.

> Note that it also complicates the rcar-sysc core driver: it has to choose
> between the cpg_mssr_*() or cpg_mstp_*() callbacks, depending on SoC, and
> also depending on DTS if we migrate the older SoCs to CPG/MSSR and want to
> maintain backwards-compatibility.
> 
> Time to finish the "renesas,apmu" enable-method work, and celebrate one big
> flag day for all the new DT evolutions?

I'll bring champagne ;-)
diff mbox

Patch

diff --git a/include/dt-bindings/power/r8a7795-sysc.h b/include/dt-bindings/power/r8a7795-sysc.h
new file mode 100644
index 0000000000000000..ee2e26ba605ef9a3
--- /dev/null
+++ b/include/dt-bindings/power/r8a7795-sysc.h
@@ -0,0 +1,42 @@ 
+/*
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A7795_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A7795_PD_CA57_CPU0		 0
+#define R8A7795_PD_CA57_CPU1		 1
+#define R8A7795_PD_CA57_CPU2		 2
+#define R8A7795_PD_CA57_CPU3		 3
+#define R8A7795_PD_CA53_CPU0		 5
+#define R8A7795_PD_CA53_CPU1		 6
+#define R8A7795_PD_CA53_CPU2		 7
+#define R8A7795_PD_CA53_CPU3		 8
+#define R8A7795_PD_A3VP			 9
+#define R8A7795_PD_CA57_SCU		12
+#define R8A7795_PD_CR7			13
+#define R8A7795_PD_A3VC			14
+#define R8A7795_PD_3DG_A		17
+#define R8A7795_PD_3DG_B		18
+#define R8A7795_PD_3DG_C		19
+#define R8A7795_PD_3DG_D		20
+#define R8A7795_PD_CA53_SCU		21
+#define R8A7795_PD_3DG_E		22
+#define R8A7795_PD_A3IR			24
+#define R8A7795_PD_A2VC0		25
+#define R8A7795_PD_A2VC1		26
+
+/* Always-on power area */
+#define R8A7795_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */