From patchwork Mon Mar 14 02:29:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8575181 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E909E9F6E1 for ; Mon, 14 Mar 2016 02:29:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 51B4420454 for ; Mon, 14 Mar 2016 02:29:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8E2BE20452 for ; Mon, 14 Mar 2016 02:29:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754514AbcCNC3O (ORCPT ); Sun, 13 Mar 2016 22:29:14 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:46155 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754254AbcCNC3N (ORCPT ); Sun, 13 Mar 2016 22:29:13 -0400 Received: from reginn.isobedori.kobe.vergenet.net (p2210-ipbfp1103kobeminato.hyogo.ocn.ne.jp [122.23.9.210]) by kirsty.vergenet.net (Postfix) with ESMTPA id 7416725B831; Mon, 14 Mar 2016 13:29:09 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1457922549; bh=pRXExK8s7ZVfQMnwQItMUVIQwFxkM/XCfpbJ2Wj22X8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WBwY1vOwjnHpb24JUfezUv0xooz7QUx95MuFUYp7X+keUTX5TuTXyxIiq55v6pV3r zOpbTFrTqElSC0vXNnL6oFpppEF4pyxpGL0Eb8XAZpH/7y6kcCZ65ZGlmoTxhcaNf5 TpLqLn/k1eGBt/2ofp7L1A2BGbWex1Qkgpk6GD+k= Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 490E39404D4; Mon, 14 Mar 2016 11:29:11 +0900 (JST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Simon Horman , Sergei Shtylyov Subject: [PATCH 1/2] ARM: dts: r8a7794: add CAN clocks to device tree Date: Mon, 14 Mar 2016 11:29:02 +0900 Message-Id: <1457922543-20975-2-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1457922543-20975-1-git-send-email-horms+renesas@verge.net.au> References: <1457922543-20975-1-git-send-email-horms+renesas@verge.net.au> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Cc: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 23 +++++++++++++++++++++-- include/dt-bindings/clock/r8a7794-clock.h | 1 + 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index eacb2b291361..c8742a599330 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -844,6 +844,24 @@ clock-output-names = "extal"; }; + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + clock-output-names = "usb_extal"; + }; + + /* External CAN clock */ + can_clk: can_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + clock-output-names = "can_clk"; + status = "disabled"; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; @@ -858,10 +876,11 @@ compatible = "renesas,r8a7794-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", - "lb", "qspi", "sdh", "sd0", "z"; + "lb", "qspi", "sdh", "sd0", "z", + "rcan"; #power-domain-cells = <0>; }; /* Variable factor clocks */ diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index f843de6bf377..222a9dcbabb8 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -21,6 +21,7 @@ #define R8A7794_CLK_SDH 6 #define R8A7794_CLK_SD0 7 #define R8A7794_CLK_Z 8 +#define R8A7794_CLK_RCAN 9 /* MSTP0 */ #define R8A7794_CLK_MSIOF0 0