From patchwork Tue Mar 15 00:26:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8584421 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id ADCB29F758 for ; Tue, 15 Mar 2016 00:26:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F30F120263 for ; Tue, 15 Mar 2016 00:26:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0F567202E5 for ; Tue, 15 Mar 2016 00:26:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754403AbcCOA0j (ORCPT ); Mon, 14 Mar 2016 20:26:39 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:44561 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754346AbcCOA0j (ORCPT ); Mon, 14 Mar 2016 20:26:39 -0400 Received: from reginn.isobedori.kobe.vergenet.net (p2210-ipbfp1103kobeminato.hyogo.ocn.ne.jp [122.23.9.210]) by kirsty.vergenet.net (Postfix) with ESMTPA id 0B12D25B82B; Tue, 15 Mar 2016 11:26:34 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1458001594; bh=IAzV44rPy+IE9z3UNQ/wwu6KtSiHAsUemIHNmod+n8c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XfN3InWwM/TBspUIubsnczYVJwyusvnEi/76mPR6A+Gsf4760NFgGPE0UQjConhpg t4JN9c33xR7aGjSjR+cPILfF391hvW81t1ZCwL4e3Exxja+bJVZajJra92LqmEvD6G uL5+AoY2vrjdN+6T74pk8DJE2MhQDl/4WlR9kLO8= Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 46452940890; Tue, 15 Mar 2016 09:26:37 +0900 (JST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Simon Horman , Sergei Shtylyov Subject: [PATCH v2 1/2] ARM: dts: r8a7794: add CAN clocks to device tree Date: Tue, 15 Mar 2016 09:26:33 +0900 Message-Id: <1458001594-632-2-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1458001594-632-1-git-send-email-horms+renesas@verge.net.au> References: <1458001594-632-1-git-send-email-horms+renesas@verge.net.au> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Cc: Sergei Shtylyov Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- v2 * As suggested by Geert Uytterhoeven: - Name clock nodes can and usb_extal - Do not add clock-output-names property to new nodes - Add MSTP9 clocks --- arch/arm/boot/dts/r8a7794.dtsi | 33 ++++++++++++++++++++++++------- include/dt-bindings/clock/r8a7794-clock.h | 3 +++ 2 files changed, 29 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index eacb2b291361..e7a3c792c97c 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -844,6 +844,22 @@ clock-output-names = "extal"; }; + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; @@ -858,10 +874,11 @@ compatible = "renesas,r8a7794-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", - "lb", "qspi", "sdh", "sd0", "z"; + "lb", "qspi", "sdh", "sd0", "z", + "rcan"; #power-domain-cells = <0>; }; /* Variable factor clocks */ @@ -1137,20 +1154,22 @@ compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, - <&cp_clk>, <&cp_clk>, <&cp_clk>, - <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>, - <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; + <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>, + <&p_clk>, <&cpg_clocks R8A7794_CLK_QSPI>, + <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, + <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = ; clock-output-names = "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", - "gpio1", "gpio0", "qspi_mod", + "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; mstp11_clks: mstp11_clks@e615099c { diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index f843de6bf377..9703fbdb81c8 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -21,6 +21,7 @@ #define R8A7794_CLK_SDH 6 #define R8A7794_CLK_SD0 7 #define R8A7794_CLK_Z 8 +#define R8A7794_CLK_RCAN 9 /* MSTP0 */ #define R8A7794_CLK_MSIOF0 0 @@ -95,6 +96,8 @@ #define R8A7794_CLK_GPIO2 10 #define R8A7794_CLK_GPIO1 11 #define R8A7794_CLK_GPIO0 12 +#define R8A7794_CLK_RCAN1 15 +#define R8A7794_CLK_RCAN0 16 #define R8A7794_CLK_QSPI_MOD 17 #define R8A7794_CLK_I2C5 25 #define R8A7794_CLK_I2C4 27