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[RFC,2/2] ARM: shmobile: r8a7740: add "sd" clock and use it

Message ID 1460897201-7184-3-git-send-email-wsa@the-dreams.de (mailing list archive)
State RFC
Delegated to: Geert Uytterhoeven
Headers show

Commit Message

Wolfram Sang April 17, 2016, 12:46 p.m. UTC 
From: Wolfram Sang <wsa+renesas@sang-engineering.com>

Create the "sd" clock and connect the SDHI MSTP clocks to it. Those
shouldn't be connect to HP directly, because they shouldn't be allowed
to change the rate of the HP clock.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 arch/arm/boot/dts/r8a7740.dtsi            | 8 ++++----
 include/dt-bindings/clock/r8a7740-clock.h | 1 +
 2 files changed, 5 insertions(+), 4 deletions(-)
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Patch

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 39b2f88ad151e4..fefe99860edf69 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -474,7 +474,7 @@ 
 					     "usb24s",
 					     "i", "zg", "b", "m1", "hp",
 					     "hpp", "usbp", "s", "zb", "m3",
-					     "cp";
+					     "cp", "sd";
 		};
 
 		/* Variable factor clocks (DIV6) */
@@ -623,8 +623,8 @@ 
 				 <&cpg_clocks R8A7740_CLK_HP>,
 				 <&sub_clk>,
 				 <&cpg_clocks R8A7740_CLK_HP>,
-				 <&cpg_clocks R8A7740_CLK_HP>,
-				 <&cpg_clocks R8A7740_CLK_HP>,
+				 <&cpg_clocks R8A7740_CLK_SD>,
+				 <&cpg_clocks R8A7740_CLK_SD>,
 				 <&cpg_clocks R8A7740_CLK_HP>,
 				 <&cpg_clocks R8A7740_CLK_HP>,
 				 <&cpg_clocks R8A7740_CLK_HP>;
@@ -642,7 +642,7 @@ 
 			compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0xe6150140 4>, <0xe615004c 4>;
 			clocks = <&cpg_clocks R8A7740_CLK_HP>,
-				 <&cpg_clocks R8A7740_CLK_HP>,
+				 <&cpg_clocks R8A7740_CLK_SD>,
 				 <&cpg_clocks R8A7740_CLK_HP>,
 				 <&cpg_clocks R8A7740_CLK_HP>;
 			#clock-cells = <1>;
diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
index 476135da0f2388..ca34e5314c4378 100644
--- a/include/dt-bindings/clock/r8a7740-clock.h
+++ b/include/dt-bindings/clock/r8a7740-clock.h
@@ -28,6 +28,7 @@ 
 #define R8A7740_CLK_ZB		14
 #define R8A7740_CLK_M3		15
 #define R8A7740_CLK_CP		16
+#define R8A7740_CLK_SD		17
 
 /* MSTP1 */
 #define R8A7740_CLK_CEU21	28