From patchwork Fri May 20 07:09:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 9128773 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C937D60221 for ; Fri, 20 May 2016 07:10:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC3E020120 for ; Fri, 20 May 2016 07:10:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B125327B18; Fri, 20 May 2016 07:10:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6998E20120 for ; Fri, 20 May 2016 07:10:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755419AbcETHKg (ORCPT ); Fri, 20 May 2016 03:10:36 -0400 Received: from xavier.telenet-ops.be ([195.130.132.52]:51826 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755415AbcETHKV (ORCPT ); Fri, 20 May 2016 03:10:21 -0400 Received: from ayla.of.borg ([84.195.107.21]) by xavier.telenet-ops.be with bizsmtp id wXAE1s00E0TjorY01XAE6z; Fri, 20 May 2016 09:10:19 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1b3eZa-0006yO-D2; Fri, 20 May 2016 09:10:14 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1b3eZd-0003cI-Nu; Fri, 20 May 2016 09:10:17 +0200 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm , Kuninori Morimoto , Rob Herring Cc: Mark Rutland , Ian Campbell , Kumar Gala , Sergei Shtylyov , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 02/23] ARM: dts: r8a73a4: Fix W=1 dtc warnings Date: Fri, 20 May 2016 09:09:53 +0200 Message-Id: <1463728214-13838-3-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463728214-13838-1-git-send-email-geert+renesas@glider.be> References: <1463728214-13838-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Move the cache-controller nodes under the cpus node, and make their unit names and reg properties match the MPIDR values. Signed-off-by: Geert Uytterhoeven --- v2: - Add missing 0x-prefix to cache-controller reg property. --- arch/arm/boot/dts/r8a73a4.dtsi | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 6954912a37537939..ca8672778fe067e1 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -31,6 +31,24 @@ power-domains = <&pd_a2sl>; next-level-cache = <&L2_CA15>; }; + + L2_CA15: cache-controller@0 { + compatible = "cache"; + reg = <0>; + clocks = <&cpg_clocks R8A73A4_CLK_Z>; + power-domains = <&pd_a3sm>; + cache-unified; + cache-level = <2>; + }; + + L2_CA7: cache-controller@100 { + compatible = "cache"; + reg = <0x100>; + clocks = <&cpg_clocks R8A73A4_CLK_Z2>; + power-domains = <&pd_a3km>; + cache-unified; + cache-level = <2>; + }; }; ptm { @@ -46,22 +64,6 @@ ; }; - L2_CA15: cache-controller@0 { - compatible = "cache"; - clocks = <&cpg_clocks R8A73A4_CLK_Z>; - power-domains = <&pd_a3sm>; - cache-unified; - cache-level = <2>; - }; - - L2_CA7: cache-controller@1 { - compatible = "cache"; - clocks = <&cpg_clocks R8A73A4_CLK_Z2>; - power-domains = <&pd_a3km>; - cache-unified; - cache-level = <2>; - }; - dbsc1: memory-controller@e6790000 { compatible = "renesas,dbsc-r8a73a4"; reg = <0 0xe6790000 0 0x10000>;