From patchwork Fri Aug 12 16:38:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 9277443 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0F53260CF5 for ; Fri, 12 Aug 2016 16:39:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0187E28A9F for ; Fri, 12 Aug 2016 16:39:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EAB6B28AAB; Fri, 12 Aug 2016 16:39:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9146828AAD for ; Fri, 12 Aug 2016 16:39:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752796AbcHLQjA (ORCPT ); Fri, 12 Aug 2016 12:39:00 -0400 Received: from albert.telenet-ops.be ([195.130.137.90]:50830 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752918AbcHLQi5 (ORCPT ); Fri, 12 Aug 2016 12:38:57 -0400 Received: from ayla.of.borg ([84.193.137.253]) by albert.telenet-ops.be with bizsmtp id WGet1t0035UCtCs06GetpM; Fri, 12 Aug 2016 18:38:53 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1bYFTx-0006EI-1K; Fri, 12 Aug 2016 18:38:53 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1bYFTy-0007aI-85; Fri, 12 Aug 2016 18:38:54 +0200 From: Geert Uytterhoeven To: linux-renesas-soc@vger.kernel.org Cc: linux-spi@vger.kernel.org, linux-clk@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH/PROTO 5/9 option 1] arm64: dts: salvator-x: Configure MSIOF parent clock Date: Fri, 12 Aug 2016 18:38:41 +0200 Message-Id: <1471019925-29083-6-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471019925-29083-1-git-send-email-geert+renesas@glider.be> References: <1471019925-29083-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add assigned-clocks and assigned-clock-rates DT properties to the cpg device node, to configure the MSIOF parent clock for 20 MHz. Not-Signed-off-by: Geert Uytterhoeven --- Not intended for upstream merge. Note that these properties could also be added to an individual MSIOF device node. As all MSIOF instances share the same parent clock, this is not a good idea: - MSIOF instances initialized before the one with the properties will use the old (default) parent clock rate. When the MSIOF instances with the properties is initialized, the parent clock rate will change. In the absence of a clock notifier, no one will notice (at this point). All subsequent operations will use the new parent clock rate. As the MSIOF driver use clk_get_rate() before setting up each transfer, it will automatically adapt. However, spi_master.{min,max}_speed_hz are not updated (note that currently they are not set by the MSIOF driver anyway!). - If you add conflicting properties to multiple msiof nodes, they will still be used, but override each other, determined by probe order. Cfr. Documentation/devicetree/bindings/clock/clock-bindings.txt "Configuring a clock's parent and rate through the device node that consumes the clock can be done only for clocks that have a single user. Specifying conflicting parent or rate configuration in multiple consumer nodes for a shared clock is forbidden." and "Configuration of common clocks, which affect multiple consumer devices can be similarly specified in the clock provider node." --- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts index 9040a691b8b61887..61c9f651adbdfcad 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts @@ -143,6 +143,11 @@ }; }; +&cpg { + assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_MSO>; + assigned-clock-rates = <20000000>; +}; + &extal_clk { clock-frequency = <16666666>; };