From patchwork Fri Sep 23 08:32:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 9347729 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3ED81607D0 for ; Fri, 23 Sep 2016 08:32:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 308922A57A for ; Fri, 23 Sep 2016 08:32:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 22A682A60B; Fri, 23 Sep 2016 08:32:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B7E7C2A527 for ; Fri, 23 Sep 2016 08:32:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932274AbcIWIcf (ORCPT ); Fri, 23 Sep 2016 04:32:35 -0400 Received: from xavier.telenet-ops.be ([195.130.132.52]:52029 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935070AbcIWIcd (ORCPT ); Fri, 23 Sep 2016 04:32:33 -0400 Received: from ayla.of.borg ([84.193.137.253]) by xavier.telenet-ops.be with bizsmtp id mwYV1t00A5UCtCs01wYVxM; Fri, 23 Sep 2016 10:32:31 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1bnLuH-00021l-8w; Fri, 23 Sep 2016 10:32:29 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1bnLuM-0007js-Fw; Fri, 23 Sep 2016 10:32:34 +0200 From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 2/2] clk: renesas: rcar-gen3-cpg: Always use readl()/writel() Date: Fri, 23 Sep 2016 10:32:32 +0200 Message-Id: <1474619552-29703-3-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1474619552-29703-1-git-send-email-geert+renesas@glider.be> References: <1474619552-29703-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The R-Car Gen3 CPG/MSSR driver uses a mix of clk_readl()/clk_writel() and readl()/writel() to access the clock registers. Settle on the generic readl()/writel(). Signed-off-by: Geert Uytterhoeven --- drivers/clk/renesas/rcar-gen3-cpg.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index 9d76076da4948fc4..742f6dc7c15653ef 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -98,7 +98,7 @@ static int cpg_sd_clock_enable(struct clk_hw *hw) u32 val, sd_fc; unsigned int i; - val = clk_readl(clock->reg); + val = readl(clock->reg); sd_fc = val & CPG_SD_FC_MASK; for (i = 0; i < clock->div_num; i++) @@ -111,7 +111,7 @@ static int cpg_sd_clock_enable(struct clk_hw *hw) val &= ~(CPG_SD_STP_MASK); val |= clock->div_table[i].val & CPG_SD_STP_MASK; - clk_writel(val, clock->reg); + writel(val, clock->reg); return 0; } @@ -120,14 +120,14 @@ static void cpg_sd_clock_disable(struct clk_hw *hw) { struct sd_clock *clock = to_sd_clock(hw); - clk_writel(clk_readl(clock->reg) | CPG_SD_STP_MASK, clock->reg); + writel(readl(clock->reg) | CPG_SD_STP_MASK, clock->reg); } static int cpg_sd_clock_is_enabled(struct clk_hw *hw) { struct sd_clock *clock = to_sd_clock(hw); - return !(clk_readl(clock->reg) & CPG_SD_STP_MASK); + return !(readl(clock->reg) & CPG_SD_STP_MASK); } static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw, @@ -138,7 +138,7 @@ static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw, u32 val, sd_fc; unsigned int i; - val = clk_readl(clock->reg); + val = readl(clock->reg); sd_fc = val & CPG_SD_FC_MASK; for (i = 0; i < clock->div_num; i++) @@ -189,10 +189,10 @@ static int cpg_sd_clock_set_rate(struct clk_hw *hw, unsigned long rate, if (i >= clock->div_num) return -EINVAL; - val = clk_readl(clock->reg); + val = readl(clock->reg); val &= ~(CPG_SD_STP_MASK | CPG_SD_FC_MASK); val |= clock->div_table[i].val & (CPG_SD_STP_MASK | CPG_SD_FC_MASK); - clk_writel(val, clock->reg); + writel(val, clock->reg); return 0; }