From patchwork Fri Oct 21 13:17:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 9389053 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0DAFA60762 for ; Fri, 21 Oct 2016 13:18:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F35632A1A4 for ; Fri, 21 Oct 2016 13:18:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E760E2A1A7; Fri, 21 Oct 2016 13:18:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2821E2A1A4 for ; Fri, 21 Oct 2016 13:18:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933068AbcJUNSZ (ORCPT ); Fri, 21 Oct 2016 09:18:25 -0400 Received: from andre.telenet-ops.be ([195.130.132.53]:49760 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933733AbcJUNRl (ORCPT ); Fri, 21 Oct 2016 09:17:41 -0400 Received: from ayla.of.borg ([84.193.137.253]) by andre.telenet-ops.be with bizsmtp id yDHd1t0055UCtCs01DHdwD; Fri, 21 Oct 2016 15:17:38 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1bxZhZ-0001pR-2g; Fri, 21 Oct 2016 15:17:37 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1bxZhd-0004gU-Cv; Fri, 21 Oct 2016 15:17:41 +0200 From: Geert Uytterhoeven To: Philipp Zabel , Michael Turquette , Stephen Boyd , Simon Horman , Magnus Damm Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 01/23] reset: Add renesas,rst DT bindings Date: Fri, 21 Oct 2016 15:17:15 +0200 Message-Id: <1477055857-17936-2-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477055857-17936-1-git-send-email-geert+renesas@glider.be> References: <1477055857-17936-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add DT bindings for the Renesas R-Car Reset Controller (R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST). As the features provided by the hardware module differ a lot across the various SoC families and members, only SoC-specific compatible values are defined. For now we use the RST only for providing access to the state of the mode pins, which is needed by the clock driver. Signed-off-by: Geert Uytterhoeven Acked-by: Magnus Damm Acked-by: Dirk Behme Acked-by: Laurent Pinchart Acked-by: Philipp Zabel Acked-by: Rob Herring --- v4: - Add Acked-by, - Fix comma and period in list, - Add RZ/G1M and RZ/G1E, v3: - Clarify current usage, - Use "renesas,-rst" instead of "renesas,rst-", - Drop "syscon" compatible value, - Add R-Car M3-W, - Add R-Car Gen1, v2: - Add Acked-by. --- .../devicetree/bindings/reset/renesas,rst.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/renesas,rst.txt diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt new file mode 100644 index 0000000000000000..fe5e0f37b3c93579 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt @@ -0,0 +1,37 @@ +DT bindings for the Renesas R-Car and RZ/G Reset Controllers + +The R-Car and RZ/G Reset Controllers provide reset control, and implement the +following functions: + - Latching of the levels on mode pins when PRESET# is negated, + - Mode monitoring register, + - Reset control of peripheral devices (on R-Car Gen1), + - Watchdog timer (on R-Car Gen1), + - Register-based reset control and boot address registers for the various CPU + cores (on R-Car Gen2 and Gen3, and on RZ/G). + + +Required properties: + - compatible: Should be + - "renesas,-reset-wdt" for R-Car Gen1, + - "renesas,-rst" for R-Car Gen2 and Gen3, and RZ/G + Examples with soctypes are: + - "renesas,r8a7743-rst" (RZ/G1M) + - "renesas,r8a7745-rst" (RZ/G1E) + - "renesas,r8a7778-reset-wdt" (R-Car M1A) + - "renesas,r8a7779-reset-wdt" (R-Car H1) + - "renesas,r8a7790-rst" (R-Car H2) + - "renesas,r8a7791-rst" (R-Car M2-W) + - "renesas,r8a7792-rst" (R-Car V2H + - "renesas,r8a7793-rst" (R-Car M2-N) + - "renesas,r8a7794-rst" (R-Car E2) + - "renesas,r8a7795-rst" (R-Car H3) + - "renesas,r8a7796-rst" (R-Car M3-W) + - reg: Address start and address range for the device. + + +Example: + + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7795-rst"; + reg = <0 0xe6160000 0 0x0200>; + };