From patchwork Mon Jan 23 11:40:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 9532315 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 01EC06042D for ; Mon, 23 Jan 2017 11:47:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F058526E82 for ; Mon, 23 Jan 2017 11:47:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E3B9927EE9; Mon, 23 Jan 2017 11:47:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9DE3426E82 for ; Mon, 23 Jan 2017 11:47:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751057AbdAWLqv (ORCPT ); Mon, 23 Jan 2017 06:46:51 -0500 Received: from mail-pf0-f195.google.com ([209.85.192.195]:33163 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750872AbdAWLqu (ORCPT ); Mon, 23 Jan 2017 06:46:50 -0500 Received: by mail-pf0-f195.google.com with SMTP id e4so9910669pfg.0; Mon, 23 Jan 2017 03:46:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=za5C/LjjP+Y1hACtdcqVcNNSVW6ZZOP+1jy/zf/PmC4=; b=t/D4EjFCzstEDht12c/g6wM5hDQzwQPD2TkuoUyQxVru2pfaZOwaFkmRWDk36djrpU /BV9BCK3h1I5inokqXCwJUvwfIZl0jvlOvMGlopti4aECZN/xdCIpPpucEnSZgoGq165 NWCQYfGWx/jox8XCYGipvwJEB53XN1hgAOzPfSRHI85jTB5+kssWhW6ChGAo/VbptXZO bIs+2TX/mhjP3CjaRKwt9/Rl7Jt8mR7VLfc/lakdvHd1kPFeMuqyRBGZ6z1KR1rVFyQT XEFQzxTDuJeaJWFqGoMdr28pwFWK7+TidtYIOFQ1sEUcaJ6ItQriN9EkVv6COiPRTDOf EkGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:date:message-id:in-reply-to :references:subject; bh=za5C/LjjP+Y1hACtdcqVcNNSVW6ZZOP+1jy/zf/PmC4=; b=aXC3yAeWjBdy6+8ThQSEHcyC23BxLq7iha+Dok3WNThsc2BqVRw1Epe0RPZq/1Ec93 5XTYZTACI93u8l4qBC70RGU7LqQg57M+NYclMWqFpqy/s8tB5YyFOTJX0fA4vzviBY+Y Rasjieedl7J71939LmW0shebHmEPweMvJGDqt2IOUj8p+pNxI5bg/cYGBGQfM76yUBfd HhgWWyo9yuXYX1eY4vTc9ppYMVR7Ryyqrtj5nqjQGSf2EJB5oxm+RwjUeHZSB4PpEGec tPXUCy35jQqOR5yohmEg7CzMuVhCYC6UlRnO5L3L5aYtj+3Cr8w2jdrShymdPb+jpPUS ZE/w== X-Gm-Message-State: AIkVDXKbHYAe4W7d6vk2+77WQA18AIWscJ0E8RLH7KgbS8rKv6scXUkmI2MyK73FoMxSiA== X-Received: by 10.98.75.156 with SMTP id d28mr31890622pfj.59.1485172009679; Mon, 23 Jan 2017 03:46:49 -0800 (PST) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id j128sm36362442pfg.73.2017.01.23.03.46.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Jan 2017 03:46:48 -0800 (PST) From: Magnus Damm To: iommu@lists.linux-foundation.org Cc: laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be, joro@8bytes.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, horms+renesas@verge.net.au, Magnus Damm Date: Mon, 23 Jan 2017 20:40:29 +0900 Message-Id: <148517162908.13306.2467186615655446796.sendpatchset@little-apple> In-Reply-To: <148517158986.13306.314435910710426381.sendpatchset@little-apple> References: <148517158986.13306.314435910710426381.sendpatchset@little-apple> Subject: [PATCH v2 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Bump up the maximum numbers of micro-TLBS to 48. Each IPMMU device instance get micro-TLB assignment via the "iommus" property in DT. Older SoCs tend to use a maximum number of 32 micro-TLBs per IPMMU instance however newer SoCs such as r8a7796 make use of up to 48 micro-TLBs. At this point no SoC specific handling is done to validate the maximum number of micro-TLBs, and because of that the DT information is assumed to be within correct range for each particular SoC. If needed in the future SoC specific feature flags can be added to handle the maximum number of micro-TLBs without requiring DT changes, however at this point this does not seem necessary. Signed-off-by: Magnus Damm Reviewed-by: Geert Uytterhoeven --- Changes since V1: - Added support for the second I/O range at 0x600. drivers/iommu/ipmmu-vmsa.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) --- 0008/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2017-01-23 19:22:54.150607110 +0900 @@ -214,7 +214,9 @@ static void set_archdata(struct device * #define IMPMBA(n) (0x0280 + ((n) * 4)) #define IMPMBD(n) (0x02c0 + ((n) * 4)) -#define IMUCTR(n) (0x0300 + ((n) * 16)) +#define IMUCTR(n) (n) < 32 ? IMUCTR0(n) : IMUCTR32(n) +#define IMUCTR0(n) (0x0300 + ((n) * 16)) +#define IMUCTR32(n) (0x0600 + (((n) - 32) * 16)) #define IMUCTR_FIXADDEN (1 << 31) #define IMUCTR_FIXADD_MASK (0xff << 16) #define IMUCTR_FIXADD_SHIFT 16 @@ -224,7 +226,9 @@ static void set_archdata(struct device * #define IMUCTR_FLUSH (1 << 1) #define IMUCTR_MMUEN (1 << 0) -#define IMUASID(n) (0x0308 + ((n) * 16)) +#define IMUASID(n) (n) < 32 ? IMUASID0(n) : IMUASID32(n) +#define IMUASID0(n) (0x0308 + ((n) * 16)) +#define IMUASID32(n) (0x0608 + (((n) - 32) * 16)) #define IMUASID_ASID8_MASK (0xff << 8) #define IMUASID_ASID8_SHIFT 8 #define IMUASID_ASID0_MASK (0xff << 0) @@ -1141,7 +1145,7 @@ static int ipmmu_probe(struct platform_d } mmu->dev = &pdev->dev; - mmu->num_utlbs = 32; + mmu->num_utlbs = 48; spin_lock_init(&mmu->lock); bitmap_zero(mmu->ctx, IPMMU_CTX_MAX); mmu->features = match->data;