From patchwork Tue Mar 7 03:17:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 9608033 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 44A3860414 for ; Tue, 7 Mar 2017 03:26:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 32FE627DC2 for ; Tue, 7 Mar 2017 03:26:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 27B7C28477; Tue, 7 Mar 2017 03:26:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B959C2832D for ; Tue, 7 Mar 2017 03:26:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754574AbdCGD02 (ORCPT ); Mon, 6 Mar 2017 22:26:28 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:34186 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753408AbdCGDZK (ORCPT ); Mon, 6 Mar 2017 22:25:10 -0500 Received: by mail-pg0-f66.google.com with SMTP id b5so4692828pgg.1; Mon, 06 Mar 2017 19:22:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=BBuQcy240Xwi0O/GONT9WL3ldlXbNRG4Xv6u4WqYg4Q=; b=fEKJE4BeZ7uBdyR/1EqpAansooS2xTYsELiE0KVC0AylkA2nY1ekNplbAgpIHutNDc Zl6jVxo2xQe7NdLzeWA8vBRpebj6juLI9tlKd6i8x5JIfWECga+7Vowcb0olAh3KLtUL 8TwrcO9EXGdu56KTFUyijuGwNF50f17MW1Z0gPG1c58SJUjluqY7dnwi42+1T+Es27ZD Ob2gupiY6c6rnENsji3K354V/SV17cLUUZmgW+naOJDDcuDJr7ow9B+gVSmMmK50J8Gi 2erHbkCM3GR6kXIajXxaFsc68jEt+iOrYZrHaYXde8zvM+5PHF00ca2q2363MbZ7sQPC JepQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:date:message-id:in-reply-to :references:subject; bh=BBuQcy240Xwi0O/GONT9WL3ldlXbNRG4Xv6u4WqYg4Q=; b=XCJqVbbA7nIFxcP2E3cO7Cc/uMmy4yZuTZHQUsuZcLOS9hAL3/nyy/cH9U/H09kGK9 kkMDCStVEMr0uca0ogmTgfiGdfyJ8q0RQnJRgCwz1uQo7/PsHyMtnfH7J0zW8kMJdUA1 bD5xfsjpyh4e8KBLvPVcxbOeW4pfjsE1Bhr16Z6PbTS+4aaqsqQC5GqR/a8Z96MzlOOk 53JA5g4kWj1WXG4w2OgTt5iM8cGRdlQQwuAN7l4qdxmrW8S2b0qmoU339qpWBoEFtdhd nd7hhMbmQM1eghMUEdX0foB4NPCmdWaQguvF8txpQxLyfUpjEBaQ5fZqpP11kGBvjY71 V2Gw== X-Gm-Message-State: AMke39nf4LpdO1yDbZe8Na4ntM/r2hBJ+GW3KT2yrT5gLCkVRvFmG+KWrWFd6LIbqzv0lA== X-Received: by 10.84.233.194 with SMTP id m2mr32170114pln.126.1488856966732; Mon, 06 Mar 2017 19:22:46 -0800 (PST) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id e129sm42083536pfe.8.2017.03.06.19.22.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Mar 2017 19:22:45 -0800 (PST) From: Magnus Damm To: joro@8bytes.org Cc: laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, iommu@lists.linux-foundation.org, horms+renesas@verge.net.au, Magnus Damm , robin.murphy@arm.com, m.szyprowski@samsung.com Date: Tue, 07 Mar 2017 12:17:03 +0900 Message-Id: <148885662362.28553.15859075114068448611.sendpatchset@little-apple> In-Reply-To: <148885660307.28553.995847796823338863.sendpatchset@little-apple> References: <148885660307.28553.995847796823338863.sendpatchset@little-apple> Subject: [PATCH v7 02/07] iommu/ipmmu-vmsa: Rework interrupt code and use bitmap for context Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Introduce a bitmap for context handing and convert the interrupt routine to handle all registered contexts. At this point the number of contexts are still limited. Also remove the use of the ARM specific mapping variable from ipmmu_irq() to allow compile on ARM64. Signed-off-by: Magnus Damm Reviewed-by: Joerg Roedel --- Changes since V6: - None drivers/iommu/ipmmu-vmsa.c | 76 ++++++++++++++++++++++++++++++++++++++------ 1 file changed, 66 insertions(+), 10 deletions(-) --- 0003/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2017-03-06 18:32:38.350607110 +0900 @@ -8,6 +8,7 @@ * the Free Software Foundation; version 2 of the License. */ +#include #include #include #include @@ -26,12 +27,17 @@ #include "io-pgtable.h" +#define IPMMU_CTX_MAX 1 + struct ipmmu_vmsa_device { struct device *dev; void __iomem *base; struct list_head list; unsigned int num_utlbs; + spinlock_t lock; /* Protects ctx and domains[] */ + DECLARE_BITMAP(ctx, IPMMU_CTX_MAX); + struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; struct dma_iommu_mapping *mapping; }; @@ -293,9 +299,29 @@ static struct iommu_gather_ops ipmmu_gat * Domain/Context Management */ +static int ipmmu_domain_allocate_context(struct ipmmu_vmsa_device *mmu, + struct ipmmu_vmsa_domain *domain) +{ + unsigned long flags; + int ret; + + spin_lock_irqsave(&mmu->lock, flags); + + ret = find_first_zero_bit(mmu->ctx, IPMMU_CTX_MAX); + if (ret != IPMMU_CTX_MAX) { + mmu->domains[ret] = domain; + set_bit(ret, mmu->ctx); + } + + spin_unlock_irqrestore(&mmu->lock, flags); + + return ret; +} + static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) { u64 ttbr; + int ret; /* * Allocate the page table operations. @@ -327,10 +353,15 @@ static int ipmmu_domain_init_context(str return -EINVAL; /* - * TODO: When adding support for multiple contexts, find an unused - * context. + * Find an unused context. */ - domain->context_id = 0; + ret = ipmmu_domain_allocate_context(domain->mmu, domain); + if (ret == IPMMU_CTX_MAX) { + free_io_pgtable_ops(domain->iop); + return -EBUSY; + } + + domain->context_id = ret; /* TTBR0 */ ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr[0]; @@ -372,6 +403,19 @@ static int ipmmu_domain_init_context(str return 0; } +static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, + unsigned int context_id) +{ + unsigned long flags; + + spin_lock_irqsave(&mmu->lock, flags); + + clear_bit(context_id, mmu->ctx); + mmu->domains[context_id] = NULL; + + spin_unlock_irqrestore(&mmu->lock, flags); +} + static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain) { /* @@ -382,6 +426,7 @@ static void ipmmu_domain_destroy_context */ ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH); ipmmu_tlb_sync(domain); + ipmmu_domain_free_context(domain->mmu, domain->context_id); } /* ----------------------------------------------------------------------------- @@ -439,16 +484,25 @@ static irqreturn_t ipmmu_domain_irq(stru static irqreturn_t ipmmu_irq(int irq, void *dev) { struct ipmmu_vmsa_device *mmu = dev; - struct iommu_domain *io_domain; - struct ipmmu_vmsa_domain *domain; + irqreturn_t status = IRQ_NONE; + unsigned int i; + unsigned long flags; - if (!mmu->mapping) - return IRQ_NONE; + spin_lock_irqsave(&mmu->lock, flags); + + /* + * Check interrupts for all active contexts. + */ + for (i = 0; i < IPMMU_CTX_MAX; i++) { + if (!mmu->domains[i]) + continue; + if (ipmmu_domain_irq(mmu->domains[i]) == IRQ_HANDLED) + status = IRQ_HANDLED; + } - io_domain = mmu->mapping->domain; - domain = to_vmsa_domain(io_domain); + spin_unlock_irqrestore(&mmu->lock, flags); - return ipmmu_domain_irq(domain); + return status; } /* ----------------------------------------------------------------------------- @@ -776,6 +830,8 @@ static int ipmmu_probe(struct platform_d mmu->dev = &pdev->dev; mmu->num_utlbs = 32; + spin_lock_init(&mmu->lock); + bitmap_zero(mmu->ctx, IPMMU_CTX_MAX); /* Map I/O memory and request IRQ. */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);