| Message ID | 148897094380.16106.17145886836361556040.sendpatchset@little-apple (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
On 08/03/17 11:02, Magnus Damm wrote: > From: Magnus Damm <damm+renesas@opensource.se> > > Write IMCTR both in the root device and the leaf node. > > Signed-off-by: Magnus Damm <damm+renesas@opensource.se> > --- > > Changes since V2: > - None > > Changes since V1: > - None > > drivers/iommu/ipmmu-vmsa.c | 17 ++++++++++++++--- > 1 file changed, 14 insertions(+), 3 deletions(-) > > --- 0018/drivers/iommu/ipmmu-vmsa.c > +++ work/drivers/iommu/ipmmu-vmsa.c 2017-03-08 18:30:36.870607110 +0900 > @@ -286,6 +286,16 @@ static void ipmmu_ctx_write(struct ipmmu > ipmmu_write(domain->root, domain->context_id * IM_CTX_SIZE + reg, data); > } > > +static void ipmmu_ctx_write2(struct ipmmu_vmsa_domain *domain, unsigned int reg, > + u32 data) That's pretty cryptic. Maybe both functions could do with less ambiguous names - something like ipmmu_ctx_write_root() vs. ipmmu_ctx_write_all(), perhaps? (and if there's a more specific hardware term than "all" that describes this kind of configuration, even better). Robin. > +{ > + if (domain->mmu != domain->root) > + ipmmu_write(domain->mmu, > + domain->context_id * IM_CTX_SIZE + reg, data); > + > + ipmmu_write(domain->root, domain->context_id * IM_CTX_SIZE + reg, data); > +} > + > /* ----------------------------------------------------------------------------- > * TLB and microTLB Management > */ > @@ -312,7 +322,7 @@ static void ipmmu_tlb_invalidate(struct > > reg = ipmmu_ctx_read(domain, IMCTR); > reg |= IMCTR_FLUSH; > - ipmmu_ctx_write(domain, IMCTR, reg); > + ipmmu_ctx_write2(domain, IMCTR, reg); > > ipmmu_tlb_sync(domain); > } > @@ -472,7 +482,8 @@ static int ipmmu_domain_init_context(str > * software management as we have no use for it. Flush the TLB as > * required when modifying the context registers. > */ > - ipmmu_ctx_write(domain, IMCTR, IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN); > + ipmmu_ctx_write2(domain, IMCTR, > + IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN); > > return 0; > } > @@ -498,7 +509,7 @@ static void ipmmu_domain_destroy_context > * > * TODO: Is TLB flush really needed ? > */ > - ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH); > + ipmmu_ctx_write2(domain, IMCTR, IMCTR_FLUSH); > ipmmu_tlb_sync(domain); > ipmmu_domain_free_context(domain->root, domain->context_id); > } >
Hi Robin, On Wed, Mar 8, 2017 at 9:34 PM, Robin Murphy <robin.murphy@arm.com> wrote: > On 08/03/17 11:02, Magnus Damm wrote: >> From: Magnus Damm <damm+renesas@opensource.se> >> >> Write IMCTR both in the root device and the leaf node. >> >> Signed-off-by: Magnus Damm <damm+renesas@opensource.se> >> --- >> >> Changes since V2: >> - None >> >> Changes since V1: >> - None >> >> drivers/iommu/ipmmu-vmsa.c | 17 ++++++++++++++--- >> 1 file changed, 14 insertions(+), 3 deletions(-) >> >> --- 0018/drivers/iommu/ipmmu-vmsa.c >> +++ work/drivers/iommu/ipmmu-vmsa.c 2017-03-08 18:30:36.870607110 +0900 >> @@ -286,6 +286,16 @@ static void ipmmu_ctx_write(struct ipmmu >> ipmmu_write(domain->root, domain->context_id * IM_CTX_SIZE + reg, data); >> } >> >> +static void ipmmu_ctx_write2(struct ipmmu_vmsa_domain *domain, unsigned int reg, >> + u32 data) > > That's pretty cryptic. Maybe both functions could do with less ambiguous > names - something like ipmmu_ctx_write_root() vs. ipmmu_ctx_write_all(), > perhaps? (and if there's a more specific hardware term than "all" that > describes this kind of configuration, even better). Yeah I agree. Will fix in next version! Thanks, / magnus
--- 0018/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2017-03-08 18:30:36.870607110 +0900 @@ -286,6 +286,16 @@ static void ipmmu_ctx_write(struct ipmmu ipmmu_write(domain->root, domain->context_id * IM_CTX_SIZE + reg, data); } +static void ipmmu_ctx_write2(struct ipmmu_vmsa_domain *domain, unsigned int reg, + u32 data) +{ + if (domain->mmu != domain->root) + ipmmu_write(domain->mmu, + domain->context_id * IM_CTX_SIZE + reg, data); + + ipmmu_write(domain->root, domain->context_id * IM_CTX_SIZE + reg, data); +} + /* ----------------------------------------------------------------------------- * TLB and microTLB Management */ @@ -312,7 +322,7 @@ static void ipmmu_tlb_invalidate(struct reg = ipmmu_ctx_read(domain, IMCTR); reg |= IMCTR_FLUSH; - ipmmu_ctx_write(domain, IMCTR, reg); + ipmmu_ctx_write2(domain, IMCTR, reg); ipmmu_tlb_sync(domain); } @@ -472,7 +482,8 @@ static int ipmmu_domain_init_context(str * software management as we have no use for it. Flush the TLB as * required when modifying the context registers. */ - ipmmu_ctx_write(domain, IMCTR, IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN); + ipmmu_ctx_write2(domain, IMCTR, + IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN); return 0; } @@ -498,7 +509,7 @@ static void ipmmu_domain_destroy_context * * TODO: Is TLB flush really needed ? */ - ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH); + ipmmu_ctx_write2(domain, IMCTR, IMCTR_FLUSH); ipmmu_tlb_sync(domain); ipmmu_domain_free_context(domain->root, domain->context_id); }