From patchwork Sun Mar 12 05:38:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 9619229 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D8E60604A9 for ; Sun, 12 Mar 2017 05:44:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CACD1285A4 for ; Sun, 12 Mar 2017 05:44:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BF425285A7; Sun, 12 Mar 2017 05:44:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B59AD285A5 for ; Sun, 12 Mar 2017 05:44:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932667AbdCLFoZ (ORCPT ); Sun, 12 Mar 2017 00:44:25 -0500 Received: from mail-pf0-f194.google.com ([209.85.192.194]:35107 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932541AbdCLFoU (ORCPT ); Sun, 12 Mar 2017 00:44:20 -0500 Received: by mail-pf0-f194.google.com with SMTP id 67so15439098pfg.2; Sat, 11 Mar 2017 21:44:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=H0U45NSK1XefQB45PKPxWvrzeIcB89724GPfQMUWWq4=; b=PdfJTgdgTy0QHDLysI9c2SqWel1s/RThyxTMzzJpcQmZjKEqSf0wo7VK/YP7LBtlU5 AwtRitV0Zd6C3A1hJANAa3qkFEUr86ZGLvB91epw211VTlJZZe4PSgz0mn7HVCL9Ro5/ 412ksu4UhKP9zV9zaOTzZmxaw8DshqdowRt7sZhT68+ufrrww4A98JKIYLG84OJWAQ82 EFWC8b41ZFRSwGZIv6IhxnNlRkob6lZlBmmVV2/Ts/qVnOlPdlFKDrgT1rNc0Wo7qOh/ 63G9DSiOApZDgSKObDyNlweOicBwxisCmoSFKWipRp7KSLuK1QHxOwZ8uNUbh6jxhCuM 8nKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:date:message-id:in-reply-to :references:subject; bh=H0U45NSK1XefQB45PKPxWvrzeIcB89724GPfQMUWWq4=; b=G6VCj2CwOHceb1Q0Hr4s93ov+bJLfYmh1mte4ASOrLx2ujULMMElvob5hf+7AolBf5 MC+ZdRjoYk6OstBTDZRVK5gbt2yaRuS/6cXj6o0wGIUHpOfcaMsr83ebO/LfU/uAlBjN 1ae+ZlvCC53Bv9c9GDxv98726A24g95glDSB3eCUJNZXiL5Sqplg17w/h6/5+kUeFSVV 7eWdyZg9n1vkRiCG8Q9OKFYnEPMy0BUUsa4NSW0TUAjpigYYCIjoaEPwhe76oOUnR3s8 EOYRCqMb+vRqCpkyOcsT/AlvDhaFOsXkv0yHla92fWzDI9EroCAi36pGSX1XThyOBzb9 0f8w== X-Gm-Message-State: AMke39lPIF9jV9cAmMHoEiR1R7zAHIBIt5vSlqARcczXKI5PHta419uhFHwjrJd6BoxhAA== X-Received: by 10.84.214.129 with SMTP id j1mr38544467pli.23.1489297459474; Sat, 11 Mar 2017 21:44:19 -0800 (PST) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id g27sm26955696pgn.20.2017.03.11.21.44.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 11 Mar 2017 21:44:17 -0800 (PST) From: Magnus Damm To: joro@8bytes.org Cc: laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, iommu@lists.linux-foundation.org, horms+renesas@verge.net.au, Magnus Damm , robin.murphy@arm.com, m.szyprowski@samsung.com Date: Sun, 12 Mar 2017 14:38:41 +0900 Message-Id: <148929712105.20744.4083416494740711767.sendpatchset@little-apple> In-Reply-To: <148929710090.20744.10912918031085568693.sendpatchset@little-apple> References: <148929710090.20744.10912918031085568693.sendpatchset@little-apple> Subject: [PATCH v3 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Bump up the maximum numbers of micro-TLBS to 48. Each IPMMU device instance get micro-TLB assignment via the "iommus" property in DT. Older SoCs tend to use a maximum number of 32 micro-TLBs per IPMMU instance however newer SoCs such as r8a7796 make use of up to 48 micro-TLBs. At this point no SoC specific handling is done to validate the maximum number of micro-TLBs, and because of that the DT information is assumed to be within correct range for each particular SoC. If needed in the future SoC specific feature flags can be added to handle the maximum number of micro-TLBs without requiring DT changes, however at this point this does not seem necessary. Signed-off-by: Magnus Damm Reviewed-by: Geert Uytterhoeven --- Changes since V2: - Added outer set of () to IMUASID() and IMUCTR() - thanks Ramesh! - Added Reviewed-by from Geert - thanks! Changes since V1: - Added support for the second I/O range at 0x600. drivers/iommu/ipmmu-vmsa.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) --- 0020/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2017-03-12 14:11:23.020607110 +0900 @@ -213,7 +213,9 @@ static void set_archdata(struct device * #define IMPMBA(n) (0x0280 + ((n) * 4)) #define IMPMBD(n) (0x02c0 + ((n) * 4)) -#define IMUCTR(n) (0x0300 + ((n) * 16)) +#define IMUCTR(n) ((n) < 32 ? IMUCTR0(n) : IMUCTR32(n)) +#define IMUCTR0(n) (0x0300 + ((n) * 16)) +#define IMUCTR32(n) (0x0600 + (((n) - 32) * 16)) #define IMUCTR_FIXADDEN (1 << 31) #define IMUCTR_FIXADD_MASK (0xff << 16) #define IMUCTR_FIXADD_SHIFT 16 @@ -223,7 +225,9 @@ static void set_archdata(struct device * #define IMUCTR_FLUSH (1 << 1) #define IMUCTR_MMUEN (1 << 0) -#define IMUASID(n) (0x0308 + ((n) * 16)) +#define IMUASID(n) ((n) < 32 ? IMUASID0(n) : IMUASID32(n)) +#define IMUASID0(n) (0x0308 + ((n) * 16)) +#define IMUASID32(n) (0x0608 + (((n) - 32) * 16)) #define IMUASID_ASID8_MASK (0xff << 8) #define IMUASID_ASID8_SHIFT 8 #define IMUASID_ASID0_MASK (0xff << 0) @@ -1164,7 +1168,7 @@ static int ipmmu_probe(struct platform_d } mmu->dev = &pdev->dev; - mmu->num_utlbs = 32; + mmu->num_utlbs = 48; spin_lock_init(&mmu->lock); bitmap_zero(mmu->ctx, IPMMU_CTX_MAX); mmu->features = match->data;