@@ -412,7 +412,6 @@
reg = <0 0xfebd0000 0 0x1000>; /* IPMMU-VI */
renesas,ipmmu-main = <&ipmmu_mm 11>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vp: mmu@fe990000 {
@@ -420,7 +419,6 @@
reg = <0 0xfe990000 0 0x1000>; /* IPMMU-VP */
renesas,ipmmu-main = <&ipmmu_mm 12>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vc0: mmu@fe6b0000 {
@@ -484,7 +482,6 @@
reg = <0 0xec680000 0 0x1000>; /* IPMMU-MP1 */
renesas,ipmmu-main = <&ipmmu_mm 5>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_sy: mmu@e7730000 {
@@ -500,7 +497,6 @@
reg = <0 0xe6740000 0 0x1000>; /* IPMMU-DS0 */
renesas,ipmmu-main = <&ipmmu_mm 0>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ds1: mmu@e7740000 {
@@ -508,7 +504,6 @@
reg = <0 0xe7740000 0 0x1000>; /* IPMMU-DS1 */
renesas,ipmmu-main = <&ipmmu_mm 1>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_mm: mmu@e67b0000 {
@@ -517,7 +512,6 @@
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
- status = "disabled";
};
dmac0: dma-controller@e6700000 {