From patchwork Wed Apr 19 09:15:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 9687117 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CEA1360383 for ; Wed, 19 Apr 2017 09:16:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C0CBA283FB for ; Wed, 19 Apr 2017 09:16:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B431D2840B; Wed, 19 Apr 2017 09:16:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 23FA8283FB for ; Wed, 19 Apr 2017 09:16:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761474AbdDSJP6 (ORCPT ); Wed, 19 Apr 2017 05:15:58 -0400 Received: from xavier.telenet-ops.be ([195.130.132.52]:52470 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761476AbdDSJPz (ORCPT ); Wed, 19 Apr 2017 05:15:55 -0400 Received: from ayla.of.borg ([84.193.137.253]) by xavier.telenet-ops.be with bizsmtp id A9Ft1v00K5UCtCs019FtQx; Wed, 19 Apr 2017 11:15:53 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1d0liL-0007IO-2O; Wed, 19 Apr 2017 11:15:53 +0200 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1d0liL-0003cA-0g; Wed, 19 Apr 2017 11:15:53 +0200 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm , Kuninori Morimoto , Yoshihiro Shimoda , Rob Herring , Mark Rutland Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 3/8] [RFC] arm64: dts: renesas: Add R-Car M3-W SiP (2 x 1 GiB) support Date: Wed, 19 Apr 2017 11:15:46 +0200 Message-Id: <1492593351-13835-4-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492593351-13835-1-git-send-email-geert+renesas@glider.be> References: <1492593351-13835-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for the R-Car M3-W System-in-Package (r8j7796), which contains: - an R-Car M3-W SoC (r8a7796), - 2 channels of 1 GiB of RAM (2 GiB total), - HyperFlash (not yet described). Signed-off-by: Geert Uytterhoeven --- Questions: - Should this file be named r8j7796-2g.dtsi instead? - What's the official name of r8j7796 with 2 x 1 GiB of RAM? --- arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi diff --git a/arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi b/arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi new file mode 100644 index 0000000000000000..ba274c132e6dd984 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8j7796-2x1g.dtsi @@ -0,0 +1,26 @@ +/* + * Device Tree Source for the r8a7796 SiP with 2 channels of 1 GiB RAM + * + * Copyright (C) 2016 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7796.dtsi" + +/ { + compatible = "renesas,r8j7796", "renesas,r8a7796"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; + }; +};