diff mbox

[8/8] ARM: drs: iwg22m: Add SPI NOR support

Message ID 1505322341-9480-9-git-send-email-chris.paterson2@renesas.com (mailing list archive)
State Accepted
Delegated to: Simon Horman
Headers show

Commit Message

Chris Paterson Sept. 13, 2017, 5:05 p.m. UTC
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>

Add support for the SPI NOR device used to boot up the system
to the System on Module DT.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
---
This patch is based on renesas-devel-20170913-v4.13.

This patch is dependant on:
- "of: add vendor prefix for Silicon Storage Technology Inc."
- "doc: dt: mtd: Add sst25vf016b to the list of supported chip names"


 arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

Comments

Biju Das Sept. 14, 2017, 7:07 a.m. UTC | #1
Hi,

> -----Original Message-----
> From: devicetree-owner@vger.kernel.org [mailto:devicetree-
> owner@vger.kernel.org] On Behalf Of Chris Paterson
> Sent: 13 September 2017 18:06
> To: Simon Horman <horms@verge.net.au>
> Cc: Rob Herring <robh+dt@kernel.org>; Mark Rutland
> <mark.rutland@arm.com>; Magnus Damm <magnus.damm@gmail.com>;
> Russell King <linux@armlinux.org.uk>; Fabrizio Castro
> <fabrizio.castro@bp.renesas.com>; devicetree@vger.kernel.org; linux-renesas-
> soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Chris Paterson
> <Chris.Paterson2@renesas.com>
> Subject: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support

Subject should be " ARM: dts: iwg22m: Add SPI NOR support"

> From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
>
> Add support for the SPI NOR device used to boot up the system to the System on
> Module DT.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
Geert Uytterhoeven Sept. 20, 2017, 11:10 a.m. UTC | #2
On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson
<chris.paterson2@renesas.com> wrote:
> From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
>
> Add support for the SPI NOR device used to boot up the system
> to the System on Module DT.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>

With the subject fixed (s/drs/dts/):
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Simon Horman Sept. 21, 2017, 8:47 a.m. UTC | #3
On Wed, Sep 20, 2017 at 01:10:00PM +0200, Geert Uytterhoeven wrote:
> On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson
> <chris.paterson2@renesas.com> wrote:
> > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> >
> > Add support for the SPI NOR device used to boot up the system
> > to the System on Module DT.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
> 
> With the subject fixed (s/drs/dts/):
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied as

ARM: dts: iwg22m: Add SPI NOR support
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index f7f9cef..ed9a8cf 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -39,6 +39,11 @@ 
 		function = "mmc";
 	};
 
+	qspi_pins: qspi {
+		groups = "qspi_ctrl", "qspi_data2";
+		function = "qspi";
+	};
+
 	sdhi1_pins: sd1 {
 		groups = "sdhi1_data4", "sdhi1_ctrl";
 		function = "sdhi1";
@@ -61,6 +66,27 @@ 
 	status = "okay";
 };
 
+&qspi {
+	pinctrl-0 = <&qspi_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	/* WARNING - This device contains the bootloader. Handle with care. */
+	flash: flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "sst,sst25vf016b", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+		m25p,fast-read;
+		spi-cpol;
+		spi-cpha;
+	};
+};
+
 &sdhi1 {
 	pinctrl-0 = <&sdhi1_pins>;
 	pinctrl-names = "default";