From patchwork Mon Sep 18 13:46:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 9956695 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 22C5C601E9 for ; Mon, 18 Sep 2017 13:48:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 131CE289B7 for ; Mon, 18 Sep 2017 13:48:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 072EB28A70; Mon, 18 Sep 2017 13:48:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B4DA28A46 for ; Mon, 18 Sep 2017 13:48:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755167AbdIRNro (ORCPT ); Mon, 18 Sep 2017 09:47:44 -0400 Received: from andre.telenet-ops.be ([195.130.132.53]:48592 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755024AbdIRNqw (ORCPT ); Mon, 18 Sep 2017 09:46:52 -0400 Received: from ayla.of.borg ([84.195.106.246]) by andre.telenet-ops.be with bizsmtp id B1mp1w01m5JzmfG011mpf3; Mon, 18 Sep 2017 15:46:50 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1dtwNp-0005uR-RE; Mon, 18 Sep 2017 15:46:45 +0200 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1dtwNt-0008EY-NN; Mon, 18 Sep 2017 15:46:49 +0200 From: Geert Uytterhoeven To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Mark Rutland , Magnus Damm Cc: Laurent Pinchart , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v3 4/7] clocksource: sh_cmt: Remove support for "renesas, cmt-32*" Date: Mon, 18 Sep 2017 15:46:44 +0200 Message-Id: <1505742407-31576-5-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505742407-31576-1-git-send-email-geert+renesas@glider.be> References: <1505742407-31576-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Remove driver matching support for the unused "renesas,cmt-32" and "renesas,cmt-32-fast" compatible values, cfr. commit 203bb3479958c48a ("devicetree: bindings: Remove unused 32-bit CMT bindings"). As this removes the last user of SH_CMT_32BIT_FAST, all support for this variant is removed from the driver. Signed-off-by: Geert Uytterhoeven --- v3: - New. --- drivers/clocksource/sh_cmt.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 45af436483f39cb0..8546736e3bc8e961 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -66,7 +66,6 @@ struct sh_cmt_device; enum sh_cmt_model { SH_CMT_16BIT, SH_CMT_32BIT, - SH_CMT_32BIT_FAST, SH_CMT_48BIT, SH_CMT0_RCAR_GEN2, SH_CMT1_RCAR_GEN2, @@ -203,16 +202,6 @@ static const struct sh_cmt_info sh_cmt_info[] = { .read_count = sh_cmt_read32, .write_count = sh_cmt_write32, }, - [SH_CMT_32BIT_FAST] = { - .model = SH_CMT_32BIT_FAST, - .width = 32, - .overflow_bit = SH_CMT32_CMCSR_CMF, - .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF), - .read_control = sh_cmt_read16, - .write_control = sh_cmt_write16, - .read_count = sh_cmt_read32, - .write_count = sh_cmt_write32, - }, [SH_CMT_48BIT] = { .model = SH_CMT_48BIT, .channels_mask = 0x3f, @@ -890,13 +879,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, case SH_CMT_48BIT: ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10; break; - case SH_CMT_32BIT_FAST: - /* - * The 32-bit "fast" timer has a single channel at hwidx 5 but - * is located at offset 0x40 instead of 0x60 for some reason. - */ - ch->ioctrl = cmt->mapbase + 0x40; - break; case SH_CMT0_RCAR_GEN2: case SH_CMT1_RCAR_GEN2: ch->iostart = cmt->mapbase + ch->hwidx * 0x100; @@ -952,8 +934,6 @@ static const struct platform_device_id sh_cmt_id_table[] = { MODULE_DEVICE_TABLE(platform, sh_cmt_id_table); static const struct of_device_id sh_cmt_of_table[] __maybe_unused = { - { .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] }, - { .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] }, { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] }, { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },